KS9286 查看數據表（PDF） - Samsung

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KS9286

DIGITAL SIGNAL PROCESSOR for CDP

Samsung 

KS9286B/KS9286B-L

2) SDAT, SBCK TIMING CHART

DIGITAL SIGNAL PROCESSOR for CDP

PBFR

SBCK

SDAT

A1

2

3

4

5

6

7

8

BQ RS T UV WC

a. After PBFR becomes falling edge, SBCK becomes "L" during about 10µS.

b. If S0S1 is "L", subcode P is outputted, and if S0S1 is "H", S0S1 is outputted.

c. If the pulse inputted to the SBCK terminal is over seven, subcode data P, Q, R, S, T, U, V, W is repeated.

Fig.5. Timing chart of Subcode-Q data output

16

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