LA6569 查看數據表（PDF） - SANYO -> Panasonic

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LA6569

5-channel Driver for Compact Disk Applications

SANYO -> Panasonic 

LA6569

Electrical Characteristics at Ta = 25°C, VCC1 = VCC2 = 8V, VREF = 1.65V, unless especially specified.

Parameter

Symbol

Conditions

Ratings

min

typ

Unit

max

All blocks

No-load current drain ON

No-load current drain OFF

VREF input voltage range

Thermal shutdown temperature

ICC-ON

ICC-OFF

VREF-IN

TSD

FWD = REV = 0, All outputs ON *1

FWD = REV = 0, All outputs OFF *1

*2

30

50 mA

10

20 mA

1

VCC-1.5

V

150

175

200 °C

BTL AMP block (CH1 to CH4)

Output offset voltage

Input voltage range

Output voltage

Closed-circuit voltage gain

VOFF

VIN

VO

VG

Voltage difference between outputs for BTL AMP,

each channel. *3

Input voltage range for input for OP-AMP.

Each voltage between VO+ and VO- when RL = 8Ω. *4

Input and output gain. *3

-60

60 mV

0

VCC-1.5

V

5.7

6.5

V

5.4

6

6.6 deg

Slew rate

SR

AMP Independent. Multiply 2 between outputs. *2

0.5

V/µs

MUTE ON voltage

VMUTE-ON Each MUTE *5

2

V

MUTE OFF voltage

VMUTE-OFF Each MUTE *5

0.5 V

Input AMP block (CH1 to CH4)

Input voltage range

Output current (SINK)

VIN-OP

SINK-OP

0

VCC-1.5

V

2

mA

Output current (SOURCE)

SOURCE-OP

*6

300

500

µA

Output offset voltage

VOFF-OP

-10

10 mV

Loading block (CH5, H bridge)

Output voltage

Break output saturation voltage

VO-LOAD

VCE-BREAK

Forward, reverse, RL = 8Ω *4

Output voltage at braking *7

5.7

6.5

V

0.3 V

Input low level

Input high level

Output set voltage

VIN-L

VIN-H

VCONT

Power supply block (PNP transistor : 2SB632K-use)

IO = 200mA (Between outputs), VCONT = 3V

2

2.9

3.15

1V

V

3.4 V

3.3V supply output

REG-IN SINK current

VOUT

REG-IN-SINK

IO = 200mA

Base current to external PNP *8

3.15

3.3

10

3.45 V

mA

Line regulation

Load regulation

Regulator ON

∆VOLN

∆VOLD

REG-EN-ON

6V≤VCC≤12V

5mA≤IO≤200mA

Regulator ON *9

20

50

2

150 mV

200 mV

V

Regulator OFF

REG-EN-OFF

Regulator OFF *9

0.5 V

*1. Current dissipation that is a sum of VCC1 and VCC2 at no load.

*2. Design guarantee value.

*3. Input AMP is a BUFFER AMP.

*4. Voltage difference between both ends of load (8Ω). Output saturated.

*5. Output ON with MUTE : [H] and OFF with MUTE : [L] (HI impedance).

*6. The source of input OP-AMP is a constant current. As the 11kΩ resistance to the next stage is a load,

pay due attention when setting the input OP-AMP gain.

*7. Short (GND) brake used. SINK side output ON.

*8. 3.3VREG incorporates a drooping protection circuit and operated when the base current is 10mA (TYP).

*9. The output is 3.3V when the REG-EN pin is HIGH.

No.7738-2/7

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