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LB1871M 查看數據表(PDF) - SANYO -> Panasonic

零件编号
产品描述 (功能)
生产厂家
LB1871M
SANYO
SANYO -> Panasonic SANYO
LB1871M Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
LB1871, 1871M
5. External interface pins
• LD pin
Output type: open collector
Breakdown voltage: 30 V absolute maximum
Saturation voltage manufacturing variation reference value (ILD = 10 mA): 0.10 to 0.15 V
• FGS pin
Output type: open collector
Breakdown voltage: 30 V absolute maximum
Saturation voltage manufacturing variation reference value (IFGS = 4 mA): 0.15 to 0.30 V
A hysteresis comparator converts the FG amplifier output to a pulse signal to create the FGS output, which is used
for speed monitoring. The pull-up resistor is not required if this pin is not used.
• S/S pin (start/stop pin)
Input type: A pnp transistor whose base is pulled up to the internal 6.3 V power supply through a 23 k
resistor, and is pulled down to ground through a 40 kresistor.
Threshold level (low high): about 2.8 V
Threshold level (high low): about 2.4 V
The LB1871 goes to stop mode with this pin in the open state.
• CLK input pin
Input type: A pnp transistor whose base is pulled up to the internal 6.3 V power supply through a 23 kresistor,
and is pulled down to ground through a 40 kresistor.
Threshold level (low high): about 2.8 V
Threshold level (high low): about 2.4 V
• N1 pin
Input type: A pnp transistor whose base is pulled up to the internal 6.3 V power supply through a 23 kresistor,
and is pulled down to ground through a 40 kresistor.
Threshold level (typical): about 2.6 V
• N2 pin
Input type: The base of a pnp transistor is pulled up to the internal 6.3 V power supply through a 23 kresistor,
and is pulled down to ground through a 40 kresistor.
Threshold level (low high): about 1.5 V
Threshold level (high low): about 3.6 V
6. FG amplifier
R1 and R2 determine the FG amplifier gain, with the DC gain G being R2/R1. C2 and C3 determine the FG amplifier
frequency characteristics, with R1 and C2 forming a high-pass filter and R2 and C3 forming a low-pass filter. Since a
Schmitt comparator follows the FG amplifier directly, R1, R2, C2, and C3 must be chosen so that the FG amplifier
output is at least 400 mVp-p. (It is desirable for the FG amplifier output to be set up to be between 1 and 3 V during
steady state rotation.) The FG amplifier is often the cause when capacity becomes a problem in noise evaluation. One
solution to that problem is to insert a capacitor of between 1000 pF and 0.1 µF between FG OUT pin and ground.
7. External capacitors
• C1
C1 is the AGC (automatic gain control) pin smoothing capacitor. This pin is an automatic gain control pin for
holding the hall amplifier output amplitude fixed. This pin outputs the three-phase hall signal envelope, and is
smoothed with a capacitor (about 0.1 µF) since it has ripple. When the hall input amplitude is small, the AGC pin
potential will rise, and when the input amplitude is large, the AGC pin potential will fall.
• C10
C10 is required for fixed voltage power supply stability. Since the output from the 6.3 V fixed voltage power
supply is supplied to all circuits within the IC, noise on this signal must be avoided. This power supply must be
adequately stabilized so that malfunctions due to noise do not occur.
• C11
C11 is required for VCC stabilization. Since, just as with C10, noise must be avoided, this capacitor is provided to
adequately stabilize the power supply. The length of the pattern lines used to connect capacitors C1, C10, and C11
between their respective pins and GND2 must be kept as short as possible. C10 and C11 require special care, since
the pattern line length can easily influence their characteristics.
No. 4849-8/10

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