LC723483W 查看數據表（PDF） - SANYO -> Panasonic

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LC723483W

Low-Voltage ETR-Controller

SANYO -> Panasonic 

Block Diagram

LC723481W/2W/3W

XIN

XOUT

FMIN

AMIN

VDD

VSS

HCTR

BRES

TEST1

TEST2

PA0

PA1

PA2

PA3

PB0

PB1

PB2

PB3

PC0

PC1

PC2

PC3

INT/PD0

PD1

PD2

PD3

AIN

AOUT

DIVIDER

REFERENCE DIVIDER

PHASE

DETECTOR

EO

SYSTEM CLOCK

GENERATOR

75kHz

1/2 1/16, 1/17

PROGRAMMBLE DIVIDER

1/8

TU

FM LOCAL 1/256

AM LOCAL 1/2, 1/4, 1/8, 1/16

DIVIDER

PLL DATA LATCH

PLL CONTROL

LCDA/B

S1

1/2

*

P-ON

RESET

BUS

DRIVER

* DATA

LATCH

/

BUS

DRIVER

DATA

LATCH

/

BUS

DRIVER

DATA

LATCH

/

BUS

DRIVER

TIME BASE COUNT

CONTROL END

UNIVERSAL

COUNTER

(20bits)

SEG

4 LA 7

LCPA/B

LCD

80 PORT

DRIVER

RAM

ADDRESS

128 × 4bits(LC723481) DECODER

192 × 4bits(LC723482)

256 × 4bits(LC723483) BANK

ROM

2k × 16bits(LC723481)

3k × 16bits(LC723482)

4k × 16bits(LC723483)

BUS

CONTROL

INSTRUCTION

DECODER

ADDRESS DECODER

SKIP

14

ADDRESS COUNTER

14

STACK

JMP

CAL

RETURN

INTERRUPT

RESET

BANK CF

LATCH

A

ALU

LATCH

B

TIMER 0

JUDGE

MPX

(5bits)

DATA BUS

DATA

LATCH

/

BUS

DRIVER

DATA

LATCH

/

BUS

DRIVER

DOUBLER

CIRCUIT

COMMON

DRIVER

BEEP TONE

DATA

LATCH

MPX

/

BUS

DRIVER

MPX

DATA

LATCH

/

BUS

DRIVER

S12

S13/PH3

S14/PH2

S15/PH1

S16/PH0

S17/PG3

S18/PG2

S19/PG1

S20/PG0

DBR1

DBR2

DBR3

DBR4

COM4

COM3

COM2

COM1

PE0/BEEP

PE1

PF0/ADI0

PF1/ADI1

PF2/ADI3

No. 7253-6/15

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