LC723462W 查看數據表（PDF） - SANYO -> Panasonic
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LC723462W Datasheet PDF : 13 Pages
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LC723461W, 723462W
Continued from preceding page.
• External reset input: During CPU and PLL operations,
instruction execution is started from location 0.
• Built-in power-on reset circuit:
The CPU starts execution from location 0 when power is
first applied.
• Halt mode: The controller-operating clock is stopped.
• Backup mode: The crystal oscillator is stopped.
• Static power-on function:
Backup state is cleared with the PF port
• Beep tone: 1.5 and 3.1 kHz
• Built-in DC-DC converter:
For LCD and A/D converter use (3 V)
Can also be used for TU + B creation by using a
secondary coil. (The DC-DC converter voltage step-up
operation can be stopped with the DCDCC instruction.)
• Built-in remaining battery life verification function:
Converts the VDD pin level through AD converter.
• Memory retention voltage: 0.5 V or higher
• Dedicated memory power supply: The RAM retention
time has been increased by the provision of a dedicated
memory power supply.
• Package: SQFP-64 (0.5-mm pitch)
• VDD power supply: 0.9 to 1.8 V
Pin Assignment
XOUT
PA3
PA2
PA1
PA0
PB3
PB2
PB1
PB0
PC3
PC2
PC1
PC0
PD3
PD2
IN T1/P D
164 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48
2
I
47
3
I
46
4
45
5
44
6
43
7
42
8 O LC723461W/3462W
41
9
SQFP-64
40
10
39
11
I/O
12
13
38
37
I/O 36
14 I/O
35
15
O
I
I/O
16
I/O 34
33
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
S3
S4
S5
S6
S7
S8
S9
S10
S11
S12
S13/PH 0
S14/PH 1
S15/PH 2
S16/PH 3
S17/PG0
S18/PG1
*: The VDD pin can also function as ADI2 A/D converter input.
No. 7275-2/13
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