LC723781N 查看數據表（PDF） - SANYO -> Panasonic

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LC723781N

Electronic tuning system for car audio ETR Microcontrollers

SANYO -> Panasonic 

LC723781N/723782N/723783N/723784/723785

Continued from preceding page.

Pin name Pin No.

I/O

PE0

16

I/O

PE1/SCK2

15

PE2/SO2

14

PE3/SI2

13

PF0

12

PF1/SCK1

11

PF2/SO1

10

PF3/SI1

9

PG0

8

PG1/SCK0

7

PG2/SO0

6

PG3/SI0

5

XIN

1

I

XOUT

100

O

Pin explanation

General-purpose I/O ports with shared functions as serial I/O ports.

The input formats are Schmitt inputs. The PE1/SCK2 and PE2/SO2

pins can be switched to function as open drain outputs.

The IOS1 instruction is used to switch between the general-purpose

I/O port and serial I/O port functions.

• When used as general-purpose I/O ports :

The pins are set to the general-purpose I/O port function using the

IOS1 instruction.

The mode (input or output) is set in 1-bit units using the IOS1

instruction

• When used serial I/O ports :

The pins are set to the serial I/O port function using the IOS1

instruction.

[Pin states when set to the serial I/O port function]

PE0, PF0, PG0 … General-purpose I/O

PE1, PF1, PG1 … SCK input or output

PE2, PF2, PG2 … SO output

PE3, PF3, PG3 … SI input

The PE1/SCK2 and PE2/SO2 pins can be switched to function as

open drain outputs with the IOS2 instruction. When using this circuit

type, the external pull-up resistors must be connected to the same

power supply as that used by the IC.

Input is disabled and the pins go to the high-impedance state in

Backup mode.

These ports are set up as general-purpose input ports after a power

on reset.

Connections for 4.5MHz/7.2MHz crystal oscillator element

Equivalent circuit

EO1

98

EO2

97

VDDPORT

39

VDDPLL

93

VSSCPU

4

VSSPORT

40

VSSADC

81

VSSPLL

96

VREG

3

O

Main charge pump outputs.

These pins output a high level when the frequency of the local

oscillator divided by n is higher than that of the reference frequency,

and they output a low level when that frequency is lower.

They go to the high-impedance state when the frequencies match.

These pins go to the high-impedance state in Backup mode, after a

power on reset, and in the PLL stopped state.

-

Power supply connections.

The VDDPORT and VSSPORT pins are mainly supply power for the

peripheral I/O blocks.

The VDDPLL and VSSPLL pins are mainly for the PLL circuits and

the regulator.

The VSSCPU pin is mainly used by the CPU block.

The VSSADC pin is mainly used by the ADC block.

Since all the VDD and VSS pins are independent, all must be

connected to the same power supply.

O

Internal low voltage output.

Connect a bypass capacitor to this pin.

Continued on next page.

No.8011-9/14

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