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LC75824W 查看數據表(PDF) - SANYO -> Panasonic

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LC75824W Datasheet PDF : 17 Pages
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Block Diagram
LC75824E, 75824W
Pin Functions
Pin
S1/P1 to S12/P12,
S13 to S51
COM1 to COM4
Pin No.
1 to 12,
13 to 51
52 to 55
Function
Segment outputs for displaying the display data transferred by serial data
input. Pins S1/P1 to S12/P12 can be used as general-purpose output ports
when so specified by the control data.
Common driver outputs.
The frame frequency fO is given by: fO = (fOSC/512) Hz.
Active
OSC
60
Oscillator connection. An oscillator circuit is formed by connecting an external
resistor and capacitor to this pin.
CE
62
H
Serial data transfer inputs.
CE: Chip enable
CL
63
These pins are connected to the CL: Synchronization clock
microcontroller.
DI: Transfer data
DI
64
Display off control input
• INH = low (VSS) .......Display forced off
Pins S1/P1 to S12/P12 = low (These pins are forced to
the segment output port
INH
61
function and held low.)
L
S13 to S51 = low
COM1 to COM4 = low
• INH = high (VDD)......Display on
Note that serial data transfers can be performed when the display is forced off.
VDD1
57
Used to apply the LCD drive 2/3 bias voltage. Short this pin to VDD2 if a
1/2-bias drive scheme is used.
VDD2
VDD
VSS
58
Used to apply the LCD drive 1/3 bias voltage. Short this pin to VDD1 if a
1/2-bias drive scheme is used.
56
Power supply. Provide a voltage of between 3.0 and 6.0 V.
59
Ground. Connect this pin to the system ground.
Handling when
I/O unused
O
Open
O
Open
I/O
GND
I
I
GND
I
I
GND
I
Open
I
Open
No.5252-5/17

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