LCX024AK 查看數據表（PDF） - Sony Semiconductor
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LCX024AK Datasheet PDF : 24 Pages
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LCX024AK
2. Clock timing conditions (Ta = 25°C, Input voltage = 3.0V, VDD = 12.0V)
Item
Symbol
Min.
Hst rise time
trHst
Hst fall time
HST
Hst data set-up time
tfHst
tdHst
–170
HCK
Hst data hold time
Hckn∗2 rise time
Hckn∗2 fall time
Hck1 fall to Hck2 rise time
thHst
trHckn
tfHckn
to1Hck
–455
–15
Hck1 rise to Hck2 fall time
to2Hck
–15
Clr rise time
trClr
Clr fall time
CLR
Clr pulse width
tfClr
twClr
3400
Clr fall to Hst rise time
toHst
1100
Vst rise time
trVst
Vst fall time
VST
Vst data set-up time
tfVst
tdVst
–50
Vst data hold time
thVst
–50
Vck rise time
VCK
Vck fall time
trVck
tfVck
En rise time
trEn
En fall time
EN
Vck fall to En fall time
tfEn
tdVck2
–100
Vck rise to En rise time
tdVck1
–100
BLK rise time
trBlk
BLK∗3 BLK fall time
BLK pulse width
tfBlk
twBlk
BLK fall to CLR fall time
toClr
600
∗2 Hckn means Hck1, Hck2. (fHckn = 1.84MHz, fVckn = 7.865kHz)
∗3 BLK pulse is used only for 16:9 mode. For 4:3 mode, connect to VSS.
Typ.
135
–135
0
0
3500
1200
32
–32
0
0
1.0
700
Max. Unit
30
30
170
–50
30
30
15
ns
15
100
100
3600
1300
100
100
50
µs
–20
100
100
100
100
ns
100
100
100
100
ms
800
ns
–7–
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