LFECP10E-3F900I 查看數據表（PDF） - Lattice Semiconductor

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LFECP10E-3F900I

LatticeECP/EC Family Data Sheet Introduction

Lattice Semiconductor 

Lattice Semiconductor

Architecture

LatticeECP/EC Family Data Sheet

Figure 2-1. Simplified Block Diagram, LatticeECP/EC Device (Top Level)

Programmable I/O Cell

(PIC) includes sysIO

Interface

sysMEM Embedded

Block RAM (EBR)

sysCONFIG Programming

Port (includes dedicated

and dual use pins)

JTAG Port

PFF (PFU without

RAM)

sysCLOCK PLL

Programmable

Functional Unit (PFU)

Figure 2-2. Simplified Block Diagram, LatticeECP-DSP Device (Top Level)

Programmable I/O Cell

(PIC) includes sysIO

Interface

sysMEM Embedded

Block RAM (EBR)

sysCONFIG Programming

Port (includes dedicated

and dual use pins)

sysDSP Block

Programmable

Functional Unit (PFU)

2-2

JTAG Port

PFF (Fast PFU

without RAM/ROM)

sysCLOCK PLL

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