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LH28F004SUB-Z9 查看數據表(PDF) - Sharp Electronics

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产品描述 (功能)
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LH28F004SUB-Z9
Sharp
Sharp Electronics Sharp
LH28F004SUB-Z9 Datasheet PDF : 31 Pages
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LH28F004SU-Z9
4M (512K × 8) Flash Memory
MEMORY MAP
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28F004SU-Z9-3
Figure 3. Memory Map (Byte-Wide Mode)
The LH28F004SU is available in a 42-pin, 0.67 mm
thick × 8 mm × 8 mm CSP package. This form factor
and pinout allow for very high board layout densities.
A Command User Interface (CUI) serves as the
system interface between the microprocessor or micro-
controller and the internal memory operation.
Internal Algorithm Automation allows Byte Writes and
Block Erase operations to be executed using a Two-
Write command sequence to the CUI in the same way
as the LH28F008SA 8M Flash Memory.
A Superset of commands have been added to the
basic LH28F008SA command-set to achieve higher
write performance and provide additional capabilities.
These new commands and features include:
• Software Locking of Memory Blocks
• Memory Protection Set/Reset Capability
• Two-Byte Serial Writes in 8-bit Systems
• Erase All Unlocked Blocks
Writing of memory data is performed typically within
20 µs. A Block Erase operation erases one of the 32
blocks in typically 0.8 seconds independent of the other
blocks.
LH28F004SU allows to erase all unlocked blocks. It
is desirable in case of which you have to implement
Erase operation maximum 32 times.
LH28F004SU enables Two-Byte serial Write which
is operated by three times command input. Writing of
memory data is performed typically within 30 µs per
two-byte. This feature can improve system write perfor-
mance by up to typically 15 µs per byte.
All operations are started by a sequence of Write
commands to the device. Status Register (described in
detail later) and a RY »/BY » output pin provide informa-
tion on the progress of the requested operation.
Same as the LF28F008SA, LH28F004SU requires
an operation to complete before the next operation can
be requested, also it allows to suspend block erase to
read data from any other block, and allow to resume
erase operation.
The LH28F004SU provides user-selectable block
locking to protect code or data such as Device Drivers,
PCMCIA card information, ROM-Executable OS or
Application Code. Each block has an associated non-
volatile lock-bit which determines the lock status of the
block. In addition, the LH28F004SU has a software con-
trolled master Write Protect circuit which prevents any
modifications to memory blocks whose lock-bits are set.
When the device power-up or RP » turns High, Write
Protect Set/Confirm command must be written. Other-
wise, all lock bits in the device remain being locked,
can’t perform the Write to each block and single block
Erase.Write Protect Set/Confirm command must be writ-
ten to reflect the actual lock status . However, when the
device power-on or RP » turns High, Erase All Unlocked
Blocks can be used. If used, Erase is performed with
reflecting actual lock status, and after that Write and
Block Erase can be used.
4

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