LP621024D-55LLI 查看數據表（PDF） - AMIC Technology
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LP621024D-55LLI Datasheet PDF : 17 Pages
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LP621024D-I Series
AC Characteristics (TA = -40°C to + 85°C, VCC = 5V ± 10%)
Symbol
Parameter
Read Cycle
tRC
Read Cycle Time
tAA
Address Access Time
tACE1
tACE2
Chip Enable Access Time
CE1
CE2
tOE
Output Enable to Output Valid
tCLZ1
tCLZ2
Chip Enable to Output in Low Z
CE1
CE2
tOLZ
Output Enable to Output in Low Z
tCHZ1
tCHZ2
Chip Disable to Output in High Z
CE1
CE2
tOHZ
Output Disable to Output in High Z
tOH
Output Hold from Address Change
Write Cycle
tWC
Write Cycle Time
tCW
Chip Enable to End of Write
tAS
Address Setup Time
tAW
Address Valid to End of Write
tWP
Write Pulse Width
tWR
Write Recovery Time
tWHZ
Write to Output in High Z
tDW
Data to Write Time Overlap
tDH
Data Hold from Write Time
tOW
Output Active from End of Write
LP621024D-55LLI
Min.
Max.
55
-
-
55
-
55
-
55
-
30
10
-
10
-
5
-
0
20
0
20
0
20
5
-
55
-
50
-
0
-
50
-
40
-
0
-
0
25
25
-
0
-
5
-
LP621024D-70LLI
Unit
Min.
Max.
70
-
ns
-
70
ns
-
70
ns
-
70
ns
-
35
ns
10
-
ns
10
-
ns
5
-
ns
0
25
ns
0
25
ns
0
25
ns
5
-
ns
70
-
ns
60
-
ns
0
-
ns
60
-
ns
50
-
ns
0
-
ns
0
30
ns
30
-
ns
0
-
ns
5
-
ns
Notes: tCHZ1, tCHZ2, tOHZ, and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are
not referred to output voltage levels.
PRELIMINARY (August, 2002, Version 0.0)
6
AMIC Technology, Inc.
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