LPC1317FHN33 查看數據表（PDF） - NXP Semiconductors.

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LPC1317FHN33

32-bit ARM Cortex-M3 microcontroller; up to 64 kB flash; up to 12 kB SRAM; USB device; USART; EEPROM

NXP Semiconductors. 

NXP Semiconductors

5. Block diagram

LPC1315/16/17/45/46/47

32-bit ARM Cortex-M3 microcontroller

SWD, JTAG

XTALIN XTALOUT

RESET

GPIO ports 0/1

LPC1315/16/17

LPC1345/46/47

TEST/DEBUG

INTERFACE

SYSTEM OSCILLATOR

IRC, WDO

BOD

ARM

CORTEX-M3

system bus

SRAM

ROM

8/10/12 kB 16 kB

POR

EEPROM

2/4 kB

FLASH

32/48/64 kB

slave

HIGH-SPEED

GPIO

slave

slave

slave

AHB-LITE BUS

CLOCK

GENERATION,

POWER CONTROL,

SYSTEM

FUNCTIONS

PLL0 USB PLL

master

USB DEVICE

slave CONTROLLER

(LPC1345/46/47)

slave

RXD

TXD

DCD , DSR(1), RI(1)

CTS, RTS, DTR

SCLK

CT16B0_MAT[2:0]

CT16B0_CAP[1:0](2)

CT16B1_MAT[1:0]

CT16B1_CAP[1:0](2)

CT32B0_MAT[3:0]

CT32B0_CAP[1:0](2)

CT32B1_MAT[3:0]

CT32B1_CAP[1:0](2)

USART/

SMARTCARD INTERFACE

16-bit COUNTER/TIMER 0

16-bit COUNTER/TIMER 1

32-bit COUNTER/TIMER 0

32-bit COUNTER/TIMER 1

WINDOWED WATCHDOG

TIMER

AHB TO APB

BRIDGE

12-bit ADC

I2C-BUS

SSP0

SSP1

IOCON

SYSTEM CONTROL

PMU

GPIO pins

GPIO PIN INTERRUPT

RI TIMER

GPIO pins

GPIO pins

GPIO GROUP0 INTERRUPT

GPIO GROUP1 INTERRUPT

CLKOUT

USB_DP

USB_DM

USB_VBUS

USB_FTOGGLE,

USB_CONNECT

AD[7:0]

SCL, SDA

SCK0, SSEL0,

MISO0, MOSI0

SCK1, SSEL1,

MISO1, MOSI1

002aag241

(1) Available on LQFP48 and LQFP64 packages only.

(2) CT16B0_CAP1, CT16B1_CAP1, CT32B1_CAP1 inputs available on LQFP64 packages only. CT32B0_CAP0 input available on

LQFP48 and LQFP64 packages only.

Fig 1. Block diagram

LPC1315_16_17_45_46_47

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 3 — 20 September 2012

© NXP B.V. 2012. All rights reserved.

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