V DD 18
+V
V SS 9
-V
ENABLE 11
SCAN 10
SCAN RESET/LOAD 12
COUNT 1
2
ALT COUNT
FIGURE 9A. LS7060C BLOCK DIAGRAM
ST5
5 STATE
STATIC SCAN COUNTER AND
CSC
DECODER
(STOPS IN STATE 5 UNTIL SCAN RESET
RSC CAUSES RESET TO STATE ONE)
ST1
ST2
ST3
ST4
CASCADE ENABLE
8
DATA OUT
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
6 5 4 3 17 16 15 14
ENABLE
THREE STATE
EN OUTPUT DRIVERS
8 BITS
MUX
G
GATE
LOAD 8 BIT LATCH
8 BIT MUX BUS
G
MUX
GATE
LOAD
8 BIT LATCH
G
MUX
GATE
LOAD 8 BIT LATCH
G
MUX
GATE
LOAD 8 BIT LATCH
B0
C
R
B7
8 BIT BINARY
COUNTER
B0
C
R
B7
8 BIT BINARY
COUNTER
B0
C
R
B7
8 BIT BINARY
COUNTER
B0
C
R
B7
8 BIT BINARY
COUNTER
13
TEST COUNT
7
RESET
V DD 1
+V
V SS 12
-V
ENABLE 14
SCAN 13
SCAN RESET/LOAD 15
G
MUX
GATE
8 BIT LATCH LOAD
FIGURE 9B. LS7061C BLOCK DIAGRAM
6 STATE
ST6
STATIC SCAN COUNTER AND
C SC
DECODER
(STOPS IN STATE 6 UNTIL SCAN RESET
RSC CAUSES RESET TO STATE ONE)
ST1
ST2
ST3
ST4 ST5
CASCADE ENABLE
11
DATA OUT
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
9 7 5 3 24 23 20 18
ENABLE
THREE STATE
EN OUTPUT DRIVERS
8 BITS
G
MUX
GATE
LOAD
8 BIT LATCH
8 BIT MUX BUS
G
MUX
GATE
LOAD
8 BIT LATCH
G
MUX
GATE
LOAD
8 BIT LATCH
G
MUX
GATE
LOAD
8 BIT LATCH
B0
C
R
B7
8 BIT BINARY
COUNTER
B0
C
R
B7
8 BIT BINARY
COUNTER
B0
C
R
B7
8 BIT BINARY
COUNTER
B0
C
R
B7
8 BIT BINARY
COUNTER
22
19
8
4
B0 21 B2 17 B4 6 B6 2
B1 B3 B5 B7
(COUNT)
DATA IN
16
TEST COUNT
10
RESET