LS7339 查看數據表（PDF） - LSI Corporation
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LS7339 Datasheet PDF : 4 Pages
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CAP (Pin 7)
The CAP input is for external component connection for the PLL fil-
ter capacitor. (See Figure 5.)
SYNC (Pin 8)
The AC Line Frequency (50/60Hz) is applied to this input. The
Phase-Lock Loop synchronizes all internal timings to the AC signal
at the SYNC input. (See Figure 5.)
NOTE 1: ON will function as described if OFF is at logic 1.
If OFF is held at logic 0, the transitions at ON will
not cause the output to turn On.
NOTE 2: OFF will function as described if ON is at logic 1.
If ON is held at logic 0, the transitions at OFF
will not cause the the output to turn Off.
SYNC
TRIG
ø
Tw
Tw
FIGURE 2. OUTPUT CONDUCTION ANGLE, Ø
FIGURE 3. OUTPUT PHASE ANGLE Ø VS ON AND OFF
ON
TS1
TS1
OFF
OFF
Ø
TD1
159˚/STATE 1
OFF/STATE 0
TS1
<TD1
159˚/STATE 1
TD1
TD1 RESTART
TS1
OFF
TS1
159˚/STATE 1
OFF
FIGURE 4. LS7339/7340 BLOCK DIAGRAM
SYNC 8
CAP 7
ON 1
OFF 2
OSC 6
V SS 5
V DD 3
BUF
PHASE-
LOCK
LOOP
BUF
BUF
CONTROL
LOGIC
OSC/TIMER
(+V)
(-V)
SYNC
PHASE-ANGLE
POINTER
ø DECODE
DIGITAL
COMPARATOR
DRIVER
4 TRIG
The information included herein is believed to be
accurate and reliable. However, LSI Computer Systems,
Inc. assumes no responsibilities for inaccuracies, nor for
any infringements of patent rights of others which may
result from its use.
7339-012703-2
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