LT1533 查看數據表（PDF） - Linear Technology

零件编号

产品描述 (功能)

生产厂家

LT1533

Ultralow Noise 1A Switching Regulator

Linear Technology 

LT1533

BLOCK DIAGRA

SHDN

VIN

PGND COL A

COL B

VC

+

NEGATIVE

FEEDBACK

– AMP

100k

50k

NFB

–

FB

gm

ERROR

+ AMP

+

1.25V

LDO REGULATOR

INTERNAL VCC

–

COMP

+

SQ

FF

RT

CT

SYNC

OSCILLATOR

R

TQ

FF

BK QB

GND

DUTY

OUTPUT

DRIVERS

SLEW CONTROL

RVSL

RCSL

1533 BD

U

OPERATIO

In noise sensitive applications, switching regulators tend

to be ruled out as a power supply option due to their

propensity for generating unwanted noise. When switch-

ing supplies are required due to efficiency or input/output

voltage constraints, great pains must be taken to work

around the noise generated by a typical supply. These

steps may include precise synchronization of the power

supply oscillator to an external clock, synchronizing the

rest of the circuit to the power supply oscillator, or halting

power supply switching during noise sensitive operations.

The LT1533 greatly simplifies the task of eliminating

supply noise by enabling the design of an inherently low

noise switching regulator power supply.

The LT1533 is a fixed frequency, current mode switching

regulator with unique circuitry to control the voltage and

current slew rates of the output switches. Slew control

capability provides much greater control over power sup-

ply components that can create conducted and radiated

electromagnetic interference. The current mode control

provides excellent AC and DC line regulation and simplifies

loop compensation.

Current Mode Control

A switching cycle begins with an oscillator discharge pulse

which resets the RS flip-flop, turning on one of the output

drivers (refer to Block Diagram). The switch current is

sensed across an internal resistor and the resulting volt-

age is amplified and compared to the output of the error

amplifier (VC pin). The driver is turned off once the output

of the current sense amplifier exceeds the voltage on the

VC pin. The toggle flip-flop ensures that the two output

drivers are enabled on alternate clock cycles. Internal

slope compensation is provided to ensure stability under

high duty cycle conditions.

6

Share Link: