LT1910IS8-PBF 查看數據表（PDF） - Linear Technology

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LT1910IS8-PBF

Protected High Side MOSFET Driver

Linear Technology 

Typical Performance Characteristics

LT1910

Turn-On Time vs Temperature

400 V+ = 24V

VGATE = 32V

350 CGATE = 1nF

300

250

200

150

100

–50 –25

0 25 50 75

TEMPERATURE (°C)

100 125

1910 G13

Turn-Off Time vs Temperature

100 V+ = 24V

90 VGATE = 2V

80 CGATE = 1nF

70

60

50

40

30

NORMAL

20

10

CURRENT LIMIT

0

–50 –25

0 25 50 75 100 125

TEMPERATURE (°C)

1910 G014

Automatic Restart Period

vs Temperature

1000 V+ = 24V

CT = 3.3µF

CT = 1µF

100

CT = 0.33µF

CT = 0.1µF

10

–50 –30 –10 10 30 50 70 90 110 130

TEMPERATURE (°C)

1910 G15

Pin Functions

GND (Pin 1): Common Ground.

TIMER (Pin 2): A timing capacitor, CT , from the TIMER

pin to ground sets the restart time following overcurrent

detection. Upon detection of an overcurrent condition, CT

is rapidly discharged to less than 1V and then recharged

by a 14µA nominal current source back to the 2.9V timer

threshold, whereupon the restart is attempted. Whenever

TIMER pulls below 2.9V, the GATE pin pulls low to turn off

the external switch. This cycle repeats until the overcurrent

condition goes away and the switch restarts successfully.

During normal operation the pin clamps at 3.5V nominal.

FAULT (Pin 3): The FAULT pin monitors the TIMER pin

voltage and indicates the overcurrent condition. Whenever

the TIMER pin is pulled below 3.3V at the onset of a cur-

rent limit condition, the FAULT pin pulls active LOW. The

FAULT pin resets HIGH immediately when the TIMER pin

ramps above 3.4V during autorestart. The FAULT pin is an

open-collector output, thus requiring an external pull-up

resistor and is intended for logic interface. The resistor

should be selected with a maximum of 1mA pull-up at

low status.

IN (Pin 4): The IN pin threshold is TTL/CMOS compatible

and has approximately 200mV of hysteresis. When the

IN pin is pulled active HIGH above 2V, an internal charge

pump is activated to pull up the GATE pin. The IN pin can

be pulled as high as 15V regardless of whether the sup-

ply is on or off. If the IN pin is left open, an internal 75k

pull-down resistor pulls the pin below 0.8V to ensure that

the GATE pin is inactive LOW.

GATE (Pin 5): The GATE pin drives the power MOSFET

gate. When the IN pin is greater than 2V, the GATE pin is

pumped approximately 12V above the supply. It has rela-

tively high impedance (the equivalence of a few hundred

kΩ) when pumped above the rail. Care should be taken

to minimize any loading by parasitic resistance to ground

or supply. The GATE pin pulls LOW when the TIMER pin

falls below 2.9V.

SENSE (Pin 6): The SENSE pin connects to the input of

a supply-referenced comparator with a 65mV nominal

offset. When the SENSE pin is taken more than 65mV

below supply, the MOSFET gate is driven LOW and the

timing capacitor is discharged. The SENSE pin threshold

has a 0.33%/°C temperature coefficient (TC), which closely

matches the TC of the drain-sense resistor formed from

the copper trace of the PCB.

For loads requiring high inrush current, an RC timing delay

can be added between the drain-sense resistor and the

SENSE pin to ensure that the current-sense comparator

does not false trigger during start-up (see Applications

Information). A maximum of 10kΩ can be inserted between

For more information www.linear.com/LT1910

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