LT3742EUF-TRPBF 查看數據表（PDF） - Linear Technology

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LT3742EUF-TRPBF

Dual, 2-Phase Step-Down Switching Controller

Linear Technology 

LT3742

Operation

The LT3742 is a dual, constant frequency, current mode

DC/DC step-down controller. The two controllers in each

device share some common circuitry including protec-

tion circuitry, the internal bias supply, voltage reference,

master oscillator and the gate drive boost regulator. The

Block Diagram shows the shared common circuitry and

the independent circuitry for both DC/DC controllers.

Important protection features included in the LT3742 are

undervoltage lockout and thermal shutdown. When either

of these conditions exist, the gate drive bias regulator and

both DC/DC controllers are disabled and both RUN/SS pins

are discharged to 0.5V to get ready for a new soft-start

cycle. Undervoltage lockout (UVLO) is programmed using

two external resistors. When the UVLO pin drops below

1.25V, a 3µA current sink is activated to provide program-

mable hysteresis for the UVLO function. A separate, less

accurate, internal undervoltage lockout will disable the

LT3742 when VIN is less than 2.5V.

The gate drive boost regulator is enabled when all internal

fault conditions have been cleared. This regulator uses

both an internal NPN power switch and Schottky diode to

generate a voltage at the BIAS pin that is 7V higher than

the input voltage. Both DC/DC controllers are disabled until

the BIAS voltage has reached ~90% of its final regulation

voltage. This ensures that sufficient gate drive to fully

enhance the external MOSFETs is present before the driver

is allowed to turn on.

The master oscillator runs at 1MHz and clocks the gate

drive boost regulator at this frequency. The master oscilla-

tor also generates two 500kHz clocks, 180° out of phase,

for the DC/DC controllers.

A power good comparator pulls the PG pin low whenever

the FB pin is not within ±10% of the 800mV internal

reference voltage. PG is the open-collector output of an

NPN that is off when the FB pin is in regulation, allowing

an external resistor to pull the PG pin high. This power

good indication is valid only when the device is enabled

(RUN/SS is high) and VIN is 4V or greater.

The LT3742 enables each controller independently when its

RUN/SS pin is above 0.5V and each controller generates

its own soft-start ramp. During start-up, the error ampli-

fier compares the FB pin to the soft-start ramp instead of

the precision 800mV reference, which slowly raises the

output voltage until it reaches its resistor programmed

regulation point. Control of the inductor current is strictly

maintained until the output voltage is reached. The LT3742

is ideal for applications where both DC/DC controllers need

to operate separately.

A pulse from the 500kHz oscillator sets the RS flip-flop

and turns on the external N-channel MOSFET. Current in

the switch and the external inductor begins to increase.

When this current reaches a level determined by the control

voltage (VC), the PWM comparator resets the flip-flop,

turning off the MOSFET. The current in the inductor then

flows through the external Schottky diode and begins to

decrease. This cycle begins again at the next set pulse from

the slave oscillator. In this way, the voltage at the VC pin

controls the current through the inductor to the output.

The internal error amplifier regulates the output voltage

by continually adjusting the VC pin voltage. Direct control

of the peak inductor current on a cycle-by-cycle basis is

managed by the current sense amplifier. Because the induc-

tor current is constantly monitored, the devices inherently

provide excellent output short-circuit protection.

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