LT3957AIUHE 查看數據表（PDF） - Linear Technology

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LT3957AIUHE

Boost, Flyback, SEPIC and Inverting Converter with 5A, 40V Switch

Linear Technology 

LT3957A

APPLICATIONS INFORMATION

The operating frequency of the LT3957A can be synchro-

nized to an external clock source. By providing a digital

clock signal into the SYNC pin, the LT3957A will operate

at the SYNC clock frequency. The LT3957A detects the

rising edge of each clock cycle. If this feature is used,

an RT resistor should be chosen to program a switching

frequency 20% slower than SYNC pulse frequency. It is

recommended that the SYNC pin has a minimum pulse

width of 200ns. Tie the SYNC pin to SGND if this feature

is not used.

Duty Cycle Consideration

Switching duty cycle is a key variable defining converter

operation. As such, its limits must be considered. Minimum

on-time is the smallest time duration that the LT3957A

is capable of turning on the power MOSFET. This time

is typically about 240ns (see Minimum On-Time in the

Electrical Characteristics table). In each switching cycle,

the LT3957A keeps the power switch off for at least

220ns (typical) (see Minimum Off-Time in the Electrical

Characteristics table).

The minimum on-time, minimum off-time and the switching

frequency define the minimum and maximum switching

duty cycles a converter is able to generate:

Minimum duty cycle = minimum on-time • frequency

Maximum duty cycle = 1 – (minimum off-time • frequency)

Programming the Output Voltage

The output voltage VOUT is set by a resistor divider, as

shown in Figure 1. The positive and negative VOUT are set

by the following equations:

VOUT,POSITIVE = 1.6V • ⎛⎝⎜1+ RR21⎞⎠⎟

VOUT,NEGATIVE = –0.8V • ⎛⎝⎜1+ RR21⎞⎠⎟

The resistors R1 and R2 are typically chosen so that

the error caused by the current flowing into the FBX pin

during normal operation is less than 1% (this translates

to a maximum value of R1 at about 158k).

Soft-Start

The LT3957A contains several features to limit peak switch

currents and output voltage (VOUT) overshoot during

start-up or recovery from a fault condition. The primary

purpose of these features is to prevent damage to external

components or the load.

High peak switch currents during start-up may occur in

switching regulators. Since VOUT is far from its final value,

the feedback loop is saturated and the regulator tries to

charge the output capacitor as quickly as possible, resulting

in large peak currents. A large surge current may cause

inductor saturation or power switch failure.

The LT3957A addresses this mechanism with the SS

pin. As shown in Figure 1, the SS pin reduces the power

MOSFET current by pulling down the VC pin through

Q2. In this way the SS allows the output capacitor to

charge gradually toward its final value while limiting the

start-up peak currents. The typical start-up waveforms

are shown in the Typical Performance Characteristics

section. The inductor current IL slewing rate is limited by

the soft-start function.

Besides start-up (with EN/UVLO), soft-start can also be

triggered by the following faults:

1. INTVCC < 2.85V

2. Thermal lockout (TLO > 165°C)

Any of these three faults will cause the LT3957A to stop

switching immediately. The SS pin will be discharged by

Q3. When all faults are cleared and the SS pin has been

discharged below 0.2V, a 10μA current source IS2 starts

charging the SS pin, initiating a soft-start operation.

The soft-start interval is set by the soft-start capacitor

selection according to the equation:

TSS

=

CSS

•

1.25V

10μA

FBX Frequency Foldback

When VOUT is very low during start-up, or an output short-

circuit on a SEPIC, an inverting, or a flyback converter, the

switching regulator must operate at low duty cycles to keep

the power switch current below the current limit, since

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