LCX020BK
2. Clock timing conditions (Ta = 25°C)
(Macintosh16 mode: fHckn = 4.8MHz, fVck = 24.9kHz)
Item
Symbol Min.
Typ.
Max. Unit
Hst rise time
trHst
—
—
30
Hst fall time
HST
Hst data setup time
tfHst
—
—
30
tdHst
70
80
90
HCK
Hst data hold time
Hckn rise time∗4
Hckn fall time∗4
Hck1 fall to Hck2 rise time
thHst
15
25
trHckn
—
—
tfHckn
—
—
to1Hck –15
0
35
30
ns
30
15
Hck1 rise to Hck2 fall time
to2Hck –15
0
15
Vst rise time
trVst
—
—
100
Vst fall time
VST
Vst data setup time
Vst data hold time
tfVst
—
tdVst
5
thVst
5
—
100
10
15
µs
10
15
Vck rise time
VCK
Vck fall time
trVck
—
tfVck
—
—
100
—
100
Enb rise time
trEnb
—
—
100
Enb fall time
tfEnb
—
—
100
ENB Vck rise/fall to Enb rise time
toEnb
400
500
—
Horizontal video period end to Enb fall time
tdEnb
900
1000
—
Enb fall to Pcg rise time
toPcg
900
1000
—
Pcg rise time
trPcg
—
—
30
ns
Pcg fall time
tfPcg
—
—
30
Pcg rise to Prg rise time
PCG
Pcg fall to Prg fall time
toPrgr
0
—
—
toPrgf
200
250
—
Pcg rise to Vck rise/fall time
toVck
0
1000
1100
Pcg pulse width
twPcg 1100
1200
1300
Blk rise time
trBlk
—
—
100
BLK∗5 Blk fall time
Blk fall to Vst rise time
Blk pulse width
tfBlk
—
toVst
1
twBlk
1
—
100
—
2
line
—
—
∗4 Hckn means Hck1 and Hck2.
∗5 Blk is the timing during SVGA mode (fHckn = 4.0MHz, fVck = 24.0kHz).
This pulse is positive polarity other than in Macintosh16 mode. Set to L level in Macintosh16 mode.
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