LTC1100MJ(RevC) 查看數據表（PDF） - Linear Technology
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LTC1100MJ Datasheet PDF : 8 Pages
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LTC1100
TYPICAL PERFOR A CE CHARACTERISTICS
Large-Signal Transient Response
G = 100, VS = ±5V
Small-Signal Transient Response
G = 100, VS = ±5V
Overload Recovery
G = 100, VS = ±5V
2V/DIV
50mV/DIV
1V/DIV
2V/DIV
10µs/DIV
LTC1100 • TPC13
Large-Signal Transient Response
G = 10 (LTC1100CS Only), VS = ±5V
10µs/DIV
LTC1100 • TPC14
Small-Signal Transient Response
G = 10 (LTC1100CS Only), VS = ±5V
5µs/DIV
LTC1100 • TPC15
Overload Recovery
G = 10 (LTC1100CS Only), VS = ±5V
2V/DIV
50ms/DIV
1V/DIV
2V/DIV
10µs/DIV
LTC1100 • TPC16
10µs/DIV
LTC1100 • TPC17
1µs/DIV
LTC1100 • TPC18
PI FU CTIO S
8-Pin DIP (16-Pin SO)
Pin 1 (2) GND REF: Connect to system ground. This sets
the zero reference for the internal op amps.
Pin 2 (4) CMRR: This pin tailors the gain of the internal
amplifiers to maximize AC CMRR. For applications which
emphasize CMRR requirements, connect a 100k resistor
and a 10pF capacitor in series from CMRR to ground. See
the Applications section.
Pin 3 (6) –VIN: Inverting Input.
Pin 4 (7) V– : Negative Supply.
Pin 5 (10) V+: Positive Supply.
Pin 6 (11) VIN: Noninverting Input.
Pin 7 (13) COMP: This pin reduces the bandwidth of the
internal amplifiers for applications at or near DC. Clock
feedthrough from the internal sampling clock can also be
6
suppressed by using the COMP pin. The standard com-
pensation circuit is a capacitor from COMP to VOUT, sized
to provide an RC pole with the internal 247k resistor
(22.5k for LTC1100CS in gain-of-10 mode). See the
Applications section.
Pin 8 (15) VOUT: Signal Output.
16-Pin SO Package Only
(3) G = 10: Short to pin (2) for gain of 10. Leave
disconnected for gain of 100.
(14) G = 10: Short to pin (15) for gain of 10. Leave
disconnected for gain of 100.
NOTE: Both pins must be shorted or open to provide
correct gain.
(1),(5),(8),(9),(12),(16) NC: No Internal Connection.
1100fc
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