LTC1418AIN-PBF 查看數據表（PDF） - Linear Technology

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LTC1418AIN-PBF

Low Power, 14-Bit, 200ksps ADC with Serial and Parallel I/O

Linear Technology 

LTC1418

APPLICATIONS INFORMATION

Referring to Figure 1, the AIN+ and AIN– inputs are connected

to the sample-and-hold capacitors (CSAMPLE) during the

acquire phase and the comparator offset is nulled by the

zeroing switches. In this acquire phase, a minimum delay

of 1µs will provide enough time for the sample-and-hold

capacitors to acquire the analog signal. During the convert

phase, the comparator zeroing switches open, putting the

comparator into compare mode. The input switches the

CSAMPLE capacitors to ground, transferring the differential

analog input charge onto the summing junction. This input

charge is successively compared with the binary weighted

charges supplied by the differential capacitive DAC. Bit

decisions are made by the high speed comparator. At the

end of a conversion, the differential DAC output balances

the AIN+ and AIN– input charges. The SAR contents (a

14‑bit data word) which represent the difference of AIN+

and AIN– are loaded into the 14-bit output latches.

DYNAMIC PERFORMANCE

The LTC1418 has excellent high speed sampling capability.

FFT (Fast Fourier Transform) test techniques are used to

test the ADC’s frequency response, distortion and noise

at the rated throughput. By applying a low distortion

sine wave and analyzing the digital output using an FFT

algorithm, the ADC’s spectral content can be examined

for frequencies outside the fundamental. Figure 2a shows

a typical LTC1418 FFT plot.

Signal-to-Noise Ratio

The signal-to-noise plus distortion ratio [S/(N + D)] is the

ratio between the RMS amplitude of the fundamental input

frequency to the RMS amplitude of all other frequency

components at the A/D output. The output is band limited

to frequencies from above DC and below half the sampling

frequency. Figure 2b shows a typical spectral content with

a 200kHz sampling rate and a 10kHz input. The dynamic

performance is excellent for input frequencies up to and

beyond the Nyquist limit of 100kHz.

0

fSAMPLE = 200kHz

–20

fIN = 9.9609375kHz

SFDR = 99.32

SINAD = 82.4

–40

–60

–80

–100

–120

0 10 20 30 40 50 60 70 80 90 100

FREQUENCY (kHz)

1418 F02a

Figure 2a. LTC1418 Nonaveraged, 4096 Point FFT,

Input Frequency = 10kHz

0

fSAMPLE = 200kHz

–20

fIN = 97.509765kHz

SFDR = 94.29

SINAD = 81.4

–40

–60

–80

–100

–120

0 10 20 30 40 50 60 70 80 90 100

FREQUENCY (kHz)

1418 F02b

Figure 2b. LTC1418 Nonaveraged, 4096 Point FFT,

Input Frequency = 97.5kHz

Effective Number of Bits

The effective number of bits (ENOBs) is a measurement

of the resolution of an ADC and is directly related to the

S/(N + D) by the equation:

N = [S/(N + D) – 1.76]/6.02

where N is the effective number of bits of resolution

and S/(N + D) is expressed in dB. At the maximum

sampling rate of 200kHz, the LTC1418 maintains near

ideal ENOBs up to the Nyquist input frequency of 100kHz

(refer to Figure 3).

1418fa

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For more information www.linear.com/LTC1418

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