LTC1669 查看數據表（PDF） - Linear Technology

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LTC1669

10-Bit Rail-to-Rail Micropower DAC with I2C Interface

Linear Technology 

LTC1669

APPLICATIONS INFORMATION

Slave Address (SOT-23 Package)

The slave address for the SOT-23 package has been

factory programmed to be “0100 000” (LTC1669) and

“0100 001” (LTC1669-1). If another address is required,

please consult the factory.

Command Byte

7

6

5

4

3

2

1

0

X

X

X

X

X

BG

SD

SY

SY 1 Allows update on Acknowledge of SYNC Address only

0 Update on Stop condition only (Power-On Default)

SD 1 Puts the device in power-down mode

0 Puts the device in standard operating mode

(Power-On Default)

BG 1 Selects the internal bandgap reference

0 Selects the supply as the reference (Power-On Default)

X

X Don’t Care

The stop condition normally initiates the update of the

DAC’s output latches. Simultaneous update of more than

one DAC or other devices on the bus can be achieved by

reissuing new start bit, address, command and data bytes

before issuing a final stop condition (which will update

all the devices). An alternate way to achieve simultaneous

LTC1669 updates is to override the stop condition update

by setting the “SY” bit of the command byte. Setting this

bit sets the device to update the DAC output latches only

at the reception of a SYNC address quick command. The

actual update occurs on the rising edge of SCL during the

Acknowledge. In this way, all devices can update on the

reception of the SYNC address quick command instead

of the STOP condition.

A Shutdown (SD) bit = HIGH will put the device in a low

power state but retain all data latch information. Shutdown

will occur at the reception of a STOP condition. This way

shutdown could be synchronized to other devices. The

output impedance of the DAC will go to a high impedance

state (≈ 500kΩ to GND).

The Bandgap (BG) bit when set to “0” selects the DAC

supply voltage as its voltage reference. The full-scale

output of the DAC with this setting is equal to the supply

voltage. When the BG bit is set to “1,” the internal bandgap

reference (≈1.25V) is selected as the DAC’s reference. The

full-scale output voltage for this setting is 2.5V.

Data Bytes

Least Significant Data Byte

7

6

5

4

3

2

1

0

D7 D6 D5 D4 D3 D2 D1 D0

Most Significant Data Byte

7

6

5

4

3

2

1

0

X

X

X

X

X

X

D9 D8

X = Don’t care

Send Byte Protocol

The Send Byte protocol used on the LTC1669 is actually a

subset of the Write Word protocol described previously.

The Send Byte protocol can only be used to send the

command byte information to the LTC1669.

1

7

11

8

11

S Slave Address Wr A Command Byte A P

S = Start Condition, Wr = Write Bit, A = Acknowledge, P = Stop Condition

1669 TA04

The Send Byte protocol is also used whenever the Write

Word protocol is interrupted for any reason. Reception of

a START or STOP condition after the Acknowledge of the

command byte, but before the Acknowledge of the last

data byte, will cause both data bytes to be ignored and

the command byte to be accepted.

Reception of a START or STOP condition before the Ac-

knowledge of the command byte will cause the interrupted

command byte to be ignored.

1669fa

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