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LTC1702AIGN 查看數據表(PDF) - Linear Technology

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LTC1702AIGN Datasheet PDF : 36 Pages
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LTC1702A
PIN FUNCTIONS
FB1 (Pin 12): Controller 1 Feedback Input. FB1 should be
connected through a resistor network to VOUT1 to set the
output voltage. The loop compensation network for con-
troller 1 also connects to FB1.
VCC (Pin 13): Power Supply Input. All internal circuits
except the output drivers are powered from this pin. VCC
should be connected to a low noise power supply voltage
between 3V and 7V and should be bypassed to SGND with
at least a 1µF capacitor in close proximity to the LTC1702A.
FB2 (Pin 14): Controller 2 Feedback Input. See FB1.
COMP2 (Pin 15): Controller 2 Loop Compensation. See
COMP1.
RUN/SS2 (Pin 16): Controller 2 Run/Soft-start. See RUN/
SS1.
FAULT (Pin 17): Output Overvoltage Fault (Latched). The
FAULT pin is an open-drain output with an internal 10µA
pull-up. If either regulated output voltage rises more than
15% above its programmed value for more than 25µs, the
FAULT output will go high and the entire LTC1702A will be
disabled. When FAULT is high, both BG pins will go high,
turning on the bottom MOSFET switches and pulling down
the high output voltage. The LTC1702A will remain latched
in this state until the power is cycled. When FAULT mode
is active, the FAULT pin will be pulled up with an internal
10µA current source. Tying FAULT directly to PGND will
disable latched FAULT mode and will allow the LTC1702A
to resume normal operation when the overvoltage fault is
removed.
PGOOD2 (Pin 18): Controller 2 Power Good. See PGOOD1.
PGND (Pin 19): Power Ground. The BGn drivers return to
this pin. Connect PGND to a high current ground node in
close proximity to the sources of external MOSFETs, QB1
and QB2, and the VIN and VOUT bypass capacitors.
SW2 (Pin 20): Controller 2 Switching Node. See SW1.
TG2 (Pin 21): Controller 2 Top Gate Drive. See TG1.
BG2 (Pin 22): Controller 2 Bottom Gate Drive. See BG1.
BOOST2 (Pin 23): Controller 2 Top Gate Driver Supply.
See BOOST1.
IMAX2 (Pin 24): Controller 2 Current Limit Set. See IMAX1.
BLOCK DIAGRAM
FCB
PVCC
VCC
BURST
LOGIC
DRIVE
LOGIC
OSC
550kHz
RUN/SS1,2
COMP1,2
3.5µA
10µA
ILIM
IMAX1,2
90% DUTY CYCLE
1VP-P
DIS
SOFT
START
100µs
DELAY
FB
+–
800mV
PGOOD
25µs
DELAY
760mV
FLT
920mV
FROM
OTHER
CONTROLLER
550mV
SHUTDOWN TO
THIS CONTROLLER
SHUTDOWN TO
ENTIRE CHIP
FROM
OTHER
CONTROLLER
6
BOOST1,2
TG1,2
SW1,2
BG1,2
PGND
SGND
PGOOD1,2
FAULT
FB1,2
1702A BD
1702afa

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