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LTC1700EMS 查看數據表(PDF) - Linear Technology

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LTC1700EMS Datasheet PDF : 16 Pages
First Prev 11 12 13 14 15 16
LTC1700
APPLICATIONS INFORMATION
3.9nF
5k
270pF
470pF
100k
316k
1
SGND
2
ITH
10
SW
8
BG
LTC1700
4
RUN/SS
9
PGND
3
VFB
6
TG
5
7
SYNC/MODE VOUT
L1
3.2µH
M2
Si9803
M1
IR7811W
C1 +
22µF
VIN
C2 3.3V
68µF
6.3V
C3 +
22µF
VOUT
C4 5V/3A
470µF
6.3V
×2
C1, C3: TAIYO YUDEN CERAMIC JMK316BJ106ML L1: SUMIDA CEP1233R2
C2: AVX TAJB68K006R
M1: INTERNATIONAL RECTIFIER IR7811W
C4: SANYO POSCAP 6TPB470M
M2: SILICONIZ Si9803
Figure 7. Design Example Schematic
1700 • F07
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1700. These items are illustrated graphically in the
layout diagram in Figure 8. Check the following in your
layout:
3. Connect the (+) plate of C2 to the source of the P-channel
MOSFET. This capacitor supports the load current when
the inductor is being “recharged”.
4. Connect the (–) plate of C2 to the source of the N-channel
MOSFET. Connect the power and signal ground to this
node.
1. Are all the components connected close to the SW node
(Pin 10)? The SW pin is the input to the VDS sense
amplifier and the current reverse comparator.
5. Does the VFB pin connect directly to the feedback
resistors? The resistive divider R1 and R2 must be con-
nected between the (+) plate of C2 and signal ground.
2. Connect the VOUT lead directly to the source of the
P-channel MOSFET. Besides supplying current to the
LTC1700, it also serves as the other input to the current
reverse comparator.
6. Keep the switching node SW away from sensitive small
signal nodes.
7. Switched currents flow in M1, M2 and C2, keep the loop
formed by these components as small as possible.
VIN L1
C3
R3
R1
C4
R2
1
SGND
2
ITH
10
SW
9
PGND
LTC1700
3
VFB
8
BG
4
RUN/SS
7
VOUT
5
6
SYNC/MODE TG
C1
M2
M1
VOUT
+
C2
1700 • F08
Figure 8. LTC1700 Layout Diagram (See PC Board Layout Checklist)
1700fa
14

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