LTC1700EMS 查看數據表（PDF） - Linear Technology

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LTC1700EMS

No RSENSE Synchronous Step-Up DC/DC Controller

Linear Technology 

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OPERATIO

output feedback voltage VFB. When the load current in-

creases, it causes a slight decreases in VFB relative to the

1.205V reference, which in turn causes the ITH voltage to

increase until the average inductor current matches the

new load current.

The internal oscillator can be synchronized to an external

clock applied to the SYNC/MODE pin and can lock to a

frequency between 400kHz to 750kHz. When not synchro-

nized, the oscillator runs at 530kHz.

The main control loop is shut down by pulling the RUN/SS

pin low. Releasing the RUN/SS pin allows an internal

3.8µA current source to charge up an external soft-start

capacitor (CSS). When this voltage reaches 0.8V, the main

control loop is enabled with the ITH voltage clamped at

approximately 5% of its maximum value. As CSS contin-

ues to charge, ITH is gradually released allowing normal

operation to resume.

An overvoltage comparator 0V guards against transient

overshoots greater than 5% above regulated voltage by

turning off both the external MOSFETs and keeping them

off until the fault is removed.

To prevent excessive inductor current buildup, the main

N-channel MOSFET is only allowed to turn on for a

maximum duty cycle of 90%.

Burst Mode Operation

The LTC1700 can be enabled to go into Burst Mode

operation at low load currents simply by connecting the

SYNC/MODE pin to a voltage of at least 1.2V. In this mode,

the peak current of the inductor is set as if VITH = 0.36V (at

low duty cycles) even though the voltage at the ITH pin is

actually at a lower value. If the inductor’s average current

is greater than the load requirement, the voltage at the ITH

pin will drop. When the ITH voltage goes below 0.12V, the

internal sleep signal goes low, turning off both external

MOSFETs. Now the load current will solely be supplied by

the output capacitor and the output voltage begins to

droop. This drooping of the output voltage results in the

rise of ITH voltage and once it has risen above 0.22V,

switching will then be resumed on the next oscillator cycle.

LTC1700

Frequency Synchronization

The LTC1700 can be externally driven by a CMOS

(0V to 1.2V) compatible clock signal between 400kHz and

750kHz. Do not synchronize the LTC1700 below 400kHz

or above 750kHz as this may cause abnormal operation.

During synchronization, Burst Mode operation is

inhibited.

Low Input Operation

When the voltage at VOUT is less than 2.3V, the LTC1700

operates in the “start-up” mode. In this mode, most

internal circuitry is turned off except the start-up oscilla-

tor, current comparator (ICMP) and the start-up compara-

tor (SC). The voltage at pins TG and BG are forced to

ensure both the external MOSFETs are off. The start-up

oscillator runs at about 210kHz at 50% duty cycle and is

used to set the latch (L1) which turns on the internal

MOSFET M1 (see Functional Diagram). When the inductor’s

current reaches 60mA, the current comparator (ICMP) is

tripped and resets the latch. This turns M1 off and the

parasitic diode of the external P-channel MOSFET is used

to transfer the energy from the inductor to the output

capacitor. The above cycle repeats again on the next

oscillator pulse.

When the output voltage rises above 2.3V, the start-up

comparator will trip, powering up the rest of the LTC1700.

All start-up circuitry will then be turned off. Now the

LTC1700 has successfully transitioned out of its start-up

mode and commences normal operation as described

under the section “Main Control Loop.”

Protection Circuitry

Two protection circuits are incorporated into the LTC1700.

To prevent the inductor from saturating the maximum

duty cycle of the regulator is limited to 90%. This is done

to ensure that at least 10% of the time energy is being

transferred from the inductor to the output capacitor.

Output overvoltage protection is also provided. Should the

output rises about 5% above the regulated value, both the

external MOSFETs will be forced off.

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