LTC2226LX(RevC) 查看數據表（PDF） - Linear Technology

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LTC2226LX
(Rev.:RevC)

12-Bit, 25Msps 125°C ADC in LQFP

Linear Technology 

LTC2226H

FUNCTIONAL BLOCK DIAGRAM

AIN+

INPUT

AIN–

S/H

FIRST PIPELINED

ADC STAGE

SECOND PIPELINED

ADC STAGE

THIRD PIPELINED

ADC STAGE

FOURTH PIPELINED

ADC STAGE

FIFTH PIPELINED

ADC STAGE

SIXTH PIPELINED

ADC STAGE

VCM

2.2µF

1.5V

REFERENCE

RANGE

SELECT

REF

SENSE

BUF

REFH

REFL INTERNAL CLOCK SIGNALS

DIFF

CLOCK/DUTY

CONTROL

REF

CYCLE

LOGIC

AMP

CONTROL

SHIFT REGISTER

AND CORRECTION

OUTPUT

DRIVERS

OVDD

OF

D11

•

•

•

D0

REFH 0.1µF REFL

2.2µF

1µF

1µF

CLK

MODE SHDN

OE

Figure 1. Functional Block Diagram

OGND

2226H F01

TIMING DIAGRAM

ANALOG

INPUT

CLK

D0-D11, OF

tAP

N

tH

N+1

tL

N+2

N+3

N+4

N+5

tD

N–5

N–4

N–3

N–2

N–1

N

2226H TD01

2226hfc

8

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