LTC2217 查看數據表（PDF） - Linear Technology
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LTC2217 Datasheet PDF : 32 Pages
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LTC2217
POWER REQUIREMENTS The ● denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. AIN = –1dBFS unless otherwise noted. (Note 4)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
VDD
PSHDN
Analog Supply Voltage
Shutdown Power
(Note 8)
SHDN = VDD
● 3.135 3.3
3.465
V
17
mW
Standard LVDS Output Mode
OVDD
Output Supply Voltage
IVDD
Analog Supply Current
IOVDD
Output Supply Current
PDIS
Power Dissipation
Low Power LVDS Output Mode
(Note 8)
●
3
3.3
3.6
V
●
365
430
mA
●
75
90
mA
●
1450 1716
mW
OVDD
Output Supply Voltage
IVDD
Analog Supply Current
IOVDD
Output Supply Current
PDIS
Power Dissipation
CMOS Output Mode
(Note 8)
●
3
3.3
3.6
V
●
363
430
mA
●
42
50
mA
●
1335 1584
mW
OVDD
IVDD
PDIS
Output Supply Voltage
Analog Supply Current
Power Dissipation
(Note 8)
● 0.5
3.6
V
●
360
430
mA
●
1190 1420
mW
TIMING CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 4)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
fS
Sampling Frequency
(Note 8)
tL
ENC Low Time
Duty Cycle Stabilizer Off (Note 7)
Duty Cycle Stabilizer On (Note 7)
●
1
105
MHz
● 4.52
4.762
500
ns
● 3.1
4.762
500
ns
tH
ENC High Time
Duty Cycle Stabilizer Off (Note 7)
Duty Cycle Stabilizer On (Note 7)
● 4.52
4.762
500
ns
● 3.1
4.762
500
ns
LVDS Output Mode (Standard and Low Power)
tD
tC
tSKEW
tRISE
tFALL
ENC to DATA Delay
ENC to CLKOUT Delay
DATA to CLKOUT Skew
Output Rise Time
Output Fall Time
(Note 7)
(Note 7)
(tC-tD) (Note 7)
● 1.3
2.5
3.8
ns
● 1.3
2.5
3.8
ns
● –0.6
0
0.6
ns
0.5
ns
0.5
ns
Data Latency Data Latency
7
Cycles
CMOS Output Mode
tD
tC
tSKEW
Data Latency
ENC to DATA Delay
ENC to CLKOUT Delay
DATA to CLKOUT Skew
Data Latency
(Note 7)
(Note 7)
(tC-tD) (Note 7)
Full Rate CMOS
Demuxed
● 1.3
2.7
● 1.3
2.7
● –0.6
0
7
7
4
ns
4
ns
0.6
ns
Cycles
Cycles
2217f
6
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