LTC2901-2IGN 查看數據表（PDF） - Linear Technology
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LTC2901-2IGN
Linear Technology
LTC2901-2IGN Datasheet PDF : 16 Pages
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LTC2901
APPLICATIO S I FOR ATIO
Power-Up
The greater of V1, V2 is the internal supply voltage (VCC).
On power-up, VCC will power the drive circuits for the RST
and the COMPX pins. This ensures that the RST and COMPX
outputs will be low as soon as V1 or V2 reaches 1V. The
RST and COMPX outputs will remain low until the part is
programmed. After programming, if any one of the VX inputs
is below its programmed threshold, RST will be a logic low.
Once all the VX inputs rise above their thresholds, an inter-
nal timer is started and RST is released after the pro-
grammed delay time. If VCC < (V3 – 1) and VCC < 2.4V, the
V3 input impedance will be low (1kΩ typ).
Monitor Programming
The LTC2901 input voltage combination is selected by
placing the recommended resistive divider from VREF to
GND and connecting the tap point to VPG, as shown in
Figure 4. Table 1 offers recommended 1% resistor values
for the various modes. The last column in Table 1 specifies
optimum VPG/VREF ratios (±0.01) to be used when pro-
gramming with a ratiometric DAC.
During power-up, once V1 or V2 reaches 2.4V max, the
monitor enters a programming period of approximately
Table 1. Voltage Threshold Programming
MODE
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
V1 (V)
5.0
5.0
3.3
3.3
3.3
5.0
5.0
5.0
5.0
5.0
3.3
3.3
3.3
5.0
5.0
5.0
V2 (V)
3.3
3.3
2.5
2.5
2.5
3.3
3.3
3.3
3.0
3.0
2.5
2.5
2.5
3.3
3.3
3.0
V3 (V)
ADJ
ADJ
ADJ
ADJ
1.5
2.5
2.5
2.5
2.5
ADJ
1.8
1.8
1.8
1.8
1.8
1.8
V4 (V) R1 (kΩ) R2 (kΩ)
ADJ Open Short
–ADJ 93.1 9.53
ADJ 86.6 16.2
–ADJ 78.7 22.1
ADJ 71.5 28.0
ADJ 66.5 34.8
1.8 59.0 40.2
1.5 53.6 47.5
ADJ 47.5 53.6
ADJ 40.2 59.0
1.5 34.8 66.5
ADJ 28.0 71.5
–ADJ 22.1 78.7
–ADJ 16.2 86.6
ADJ 9.53 93.1
ADJ Short Open
VPG
VREF
0.000
0.094
0.156
0.219
0.281
0.344
0.406
0.469
0.531
0.594
0.656
0.719
0.781
0.844
0.906
1.000
Downloaded from: http://www.datasheetcatalog.com/
R1
LTC2901
VREF
VPG
GND
12
11
10
1%
R2
1%
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Figure 4. Monitor Programming
150µs during which the voltage on the VPG pin is sampled
and the monitor is configured to the desired input combi-
nation. Do not add capacitance to the VPG pin. Immediately
after programming, the comparators are enabled and
supply monitoring will begin.
Supply Monitoring
The LTC2901 is a low power, high accuracy program-
mable quad supply monitoring circuit with four nondelayed
monitor outputs, a common reset output and a watchdog
timer. Watchdog and reset timing are both adjustable
using external capacitors. Single pin programming selects
1 of 16 input voltage monitor combinations. All four
voltage inputs must be above predetermined thresholds
for the reset not to be invoked. The LTC2901 will assert the
reset and comparator outputs during power-up, power-
down and brownout conditions on any one of the voltage
inputs.
The inverting inputs on the V3 and/or V4 comparators are
set to 0.5V when the positive adjustable modes are selected
(Figure 5). The tap point on an external resistive divider,
connected between the positive voltage being sensed and
ground, is connected to the high impedance noninverting
inputs (V3, V4). The trip voltage is calculated from:
VTRIP = 0.5V⎛⎝⎜1+ RR34⎞⎠⎟
In the negative adjustable mode, the noninverting input on
the V4 comparator is connected to ground (Figure 6). The
tap point on an external resistive divider, connected be-
tween the negative voltage being sensed and the VREF pin,
is connected to the high impedance inverting input (V4).
VREF provides the necessary level shift required to operate
at ground. The trip voltage is calculated from:
VTRIP = –VREF⎛⎝⎜ RR34⎞⎠⎟; VREF = 1.210V Nominal
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