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LTC2926IUFD 查看數據表(PDF) - Linear Technology

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LTC2926IUFD
Linear
Linear Technology Linear
LTC2926IUFD Datasheet PDF : 28 Pages
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LTC2926
APPLICATIO S I FOR ATIO
SUPPLY
LTC2926
VCC
TRACKING CELL
0.8V
MASTER
RAMP
RTB
TRACK
ITRACK
RTA
GATE CONTROLLER CELL
0.8V +
VCC + 5V
10µA
10µA
QEXT
SGATE
SLAVE
RFB
FB
IFB
RFA
2926 F05
Figure 5. Simplified Tracking Cell and Gate Controller Cell Combination
RFA and RFB. The slave output voltage varies as a function
of the master signal with terms set by RTA and RTB. By
selecting appropriate values of RTA and RTB, it is possible
to generate any of the profiles in Figures 1 to 4.
Controlling the Ramp-Up and Ramp-Down Behavior
The operation of the LTC2926 is most easily understood by
referring to the simplified functional diagram in Figure 6.
When the ON pin is low, the remote sense switch is opened
and the MGATE pin is pulled to ground causing the master
signal to remain low. Since the current through RTB1 is at
its maximum when the master signal is low, the current
sourced by FB1 is also at its maximum. The current forces
the FB1 pin voltage above 0.8V, which pulls the SGATE1
pin low and disconnects the slave’s supply generator. The
minimum voltage across the slave load is a function of the
maximum FB1 current, the feedback divider resistors, and
the load resistance (see Load Requirements).
When the ON pin rises above 1.23V, the master signal
ramps up, and the slave supply tracks the master signal.
The master ramp rate is set by an external capacitor driven
by a 10µA current source from an internal charge pump. If
no external MOSFET is used for the master signal, the ramp
rate is set by tying the MGATE and RAMP pins together
at one terminal of the external capacitor (see Ratiometric
Tracking Example or Supply Sequencing Example). The
MGATE pin voltage will be limited to VCC + 1V (max) by
the weak internal clamp on the RAMP pin.
The rising master signal decreases the tracking current
mirrored out of the FB1 pin. The gate controller circuitry
maintains 0.8V at FB1 by driving the SGATE1 voltage and,
via the external MOSFET source-follower, the slave supply
output. When the slave supply output reaches the slave
supply module voltage, the FB1 pin will fall below 0.8V
and the gate controller will drive the SGATE1 pin above
VCC to fully enhance the MOSFET.
After the MGATE, SGATE1 and SGATE2 pins reach their
maximum voltages, the RSGATE pin is pulled up by a
10µA current source from an internal charge pump,
which closes the integrated remote sense switches. The
integrated remote sense switch allows the slave supply
generator to compensate for voltage drop across the slave’s
MOSFET (Q1).
When the ON pin falls below VON(TH) ΔVON(TH), typically
1.16V, the remote sense switch opens and the MGATE pin
pulls down with 10µA. The master signal and the slave
supplies will fall at the same rate as they rose previously,
following the tracking or sequencing profile in reverse.
The ON pin can be controlled by a digital I/O pin or it
can be used to monitor an input supply. By connecting a
resistive voltage divider from an input supply to the ON
pin, the supplies will ramp up only after the monitored
supply reaches a preset voltage.
2926fa
11

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