LTC690 查看數據表（PDF） - Linear Technology

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LTC690

Microprocessor Supervisory Circuits

Linear Technology 

LTC690/LTC691

LTC694/LTC695

APPLICATIONS INFORMATION

The LTC691 and LTC695 provide an additional output

(Watchdog Output, WDO) which goes low if the watchdog

timer is allowed to time out and remains low until set high

by the next transition on the WDI pin. WDO is also set high

when VCC falls below the reset voltage threshold or VBATT.

The LTC691 and LTC695 have two additonal pins OSC SEL

and OSC IN, which allow reset active time and watchdog

timeout period to be adjusted per Table 2. Several

configurations are shown in Figure 12.

OSC IN can be driven by an external clock signal or an

external capacitor can be connected between OSC IN and

VCC = 5V

WDI

GND when OSC SEL is forced low. In these configurations,

the nominal reset active time and watchdog timeout

period are determined by the number of clocks or set by

the formula in Table 2. When OSC SEL is high or floating,

the internal oscillator is enabled and the reset active time

is fixed at 35ms minimum for the LTC691 and 140ms

minimum for the LTC695. OSC IN selectes between the

1 second and 70ms minimum normal watchdog timeout

periods. In both cases, the timeout period immediately

after a reset is at least 1 second.

WDO

RESET

t1 = RESET ACTIVE TIME

t2 = NORMAL WATCHDOG TIME-OUT PERIOD

t3 = WATCHDOG TIME-OUT PERIOD IMMEDIATELY

AFTER A RESET

t2

t3

t1

t1

690 F11

Figure 11. Watchdog Timeout Period and Reset Active Time

EXTERNAL CLOCK

3

5V

VCC

8

OSC SEL

LTC691

LTC695

4

GND

7

OSC IN

EXTERNAL OSCILLATOR

5V

3

VCC

8

OSC SEL

LTC691

LTC695

4

GND

7

OSC IN

INTERNAL OSCILLATOR

1.6 SECOND WATCHDOG

5V 3 VCC

8

OSC SEL

FLOATING

OR HIGH

INTERNAL OSCILLATOR

100ms WATCHDOG

3

5V

VCC

OSC SEL 8

FLOATING

OR HIGH

LTC691

LTC695

4

GND

7 FLOATING

OSC IN

OR HIGH

LTC691

LTC695

4

GND

7

OSC IN

690 F12

Figure 12. Oscillator Configurations

690fe

14

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