LTC6909 查看數據表（PDF） - Linear Technology

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LTC6909

1 to 8 Output, Multiphase Silicon Oscillator with Spread Spectrum Modulation

Linear Technology 

LTC6909

OPERATION

Spread Spectrum Frequency Modulation

The LTC6909 can operate with spread spectrum frequency

modulation (SSFM). In this mode, the oscillator’s frequency

is modulated by a pseudorandom noise (PRN) signal

to spread the oscillator’s energy over a wide frequency

band. This spreading decreases the peak electromagnetic

radiation levels and improves electromanetic compatibility

(EMC) performance.

The amount of frequency spreading is fixed at 20% (±10%),

where frequency spreading is defined as:

Frequency Spreading (in %) = 100 • (fMAX – fMIN)/fOUT

The IMASTER current is a dynamic signal generated by

a multiplying digital-to-analog converter (MDAC) refer-

enced to ISET and lowpass filtered. IMASTER varies in a

psuedorandom noise-like manner between 0.9 • ISET and

1.1 • ISET. This causes the output frequency to vary in

a pseudorandom noise-like manner between 0.9 • fOUT

and 1.1 fOUT.

To disable the SSFM, connect one of the active outputs

to the MOD pin. An AC detector circuit shuts down the

modulation circuitry if a frequency in the vicinity of the

output frequency is detected at the MOD pin.

As stated previously, the modulating waveform is a pseu-

dorandom noise-like waveform. The pseudorandom signal

is generated by a linear feedback shift register that is 15

bits long. The pseudorandom sequence will repeat every

(215 – 1) • N clock cycles. This guarantees a repetition

rate below 13Hz for output frequencies up to 6.67MHz.

Seven bits of the shift register are sent in parallel to the

MDAC which produces the modulating current waveform.

Being a digitally generated signal, the output of the MDAC

is not a perfectly smooth waveform, but consists of (27)

discrete steps that change every shift register clock cycle.

Note that the shift register clock is the output frequency,

fOUT, divided by N, where N is the modulation rate divider

setting, which is determined by the state of the MOD pin.

The MOD pin should be tied to ground for the N = 16 set-

ting. Floating the MOD pin selects N = 32. The MOD pin

should be tied to V+ for the N = 64 setting.

The output of the MDAC is then filtered by a lowpass filter

with a corner frequency set to the modulation rate (fOUT/N).

This limits the rate of frequency change and softens the

corners of the frequency control signal, but allows the

waveform to fully settle at each frequency step. The rise

and fall times of this single pole filter are approximately

0.35/fCORNER. This is beneficial for clocking switching

regulators, as discussed in the Applications Information

section. Figure 3 illustrates how the output frequency

varies over time.

fOUT + 10%

128 STEPS

fOUT – 10%

tSTEP = N/fOUT

tSTEP

tREPEAT

TIME

Figure 3

tREPEAT = ((215 – 1) • N)/fOUT

6909 F03

6909f

11

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