LTC6943 查看數據表（PDF） - Linear Technology

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LTC6943

Micropower, Dual Precision Instrumentation Switched Capacitor Building Block

Linear Technology 

TEST CIRCUITS

Test Circuit 1. Leakage Current Test

(6, 11, 5, 16)

A

+

0V TO 10V

(7, 12, 4, 13)

(9, 10, 1, 2)

NOTE: TO OPEN SWITCHES,

S1 AND S3 PIN 14,

SHOULD BE CONNECTED

TO V–. TO OPEN S2, S4, THE

COSC PIN 14 SHOULD BE

CONNECTED TO V+ COSC

6943 • TC01

Test Circuit 3. Oscillator Frequency, fOSC

(TEST PIN) 1

V+

+

3

4

+

5

IV

LTC6943

V–

15

COSC 14

6943 • TC03

APPLICATIO S I FOR ATIO

Common Mode Rejection Ratio (CMRR)

The LTC6943, when used as a differential to single-ended

converter rejects common mode signals and preserves

differential voltages (Figure 1). Unlike other techniques,

the LTC6943’s CMRR does not degrade with increasing

common mode voltage frequency. During the sampling

mode, the impedance of Pins 1, 2 (and 9, 10) should be

balanced, otherwise, common mode signals will appear

differentially. The value of the CMRR depends on the value

of the sampling and holding capacitors (CS, CH) and on the

sampling frequency. Since the common mode voltages

are not sampled, the common mode signal frequency can

well exceed the sampling frequency without experiencing

aliasing phenomena. The CMRR of Figure 1 is measured

by shorting Pins 6 and 11 and by observing, with a

LTC6943

Test Circuit 2. RON Test

(6, 11, 5, 16)

(7, 12, 4, 13)

+

VIN

100µA to 1mA

CURRENT SOURCE

(9, 10, 1, 2)

A

6943 • TC02

Test Circuit 4. CMRR Test

6

7

VOUT

8

9

1µF

10

CAPACITORS ARE

1µF NOT ELECTROLYTIC

11

12

+ V– ≤ VCM ≤ V+

( ) CMRR = 20 LOG

VCM

VOUT

NOTE: FOR OPTIMUM CMRR, THE COSC SHOULD

BE LARGER THAN 0.0047µF, AND

THE SAMPLING CAPACITOR ACROSS

PINS 9 AND 10 SHOULD BE PLACED

OVER A SHIELD TIED TO PIN 8

6943 • TC04

1/2 LTC6943

6

7

+

VD

C+ 9

CS

C– 10

+

VD

CH

11

12

+

VCM

CS, CH ARE MYLAR OR POLYPROPYLENE

6943 • AI01

Figure 1. Differential to Single-Ended Converter

6943f

5

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