AD7467BRT 查看數據表（PDF） - Analog Devices
零件编号
产品描述 (功能)
生产厂家
AD7467BRT Datasheet PDF : 28 Pages
| |||
AD7466/AD7467/AD7468
AD7467
VDD = 1.6 V to 3.6 V, fSCLK = 3.4 MHz, fSAMPLE = 100 kSPS, unless otherwise noted. TA = TMIN to TMAX, unless otherwise noted.
The temperature range for the B version is −40°C to +85°C.
Table 2.
Parameter
DYNAMIC PERFORMANCE
B Version
Unit
Signal-to-Noise and Distortion (SINAD) 61
Total Harmonic Distortion (THD)
−72
Peak Harmonic or Spurious Noise (SFDR) −74
Intermodulation Distortion (IMD)
Second-Order Terms
−83
Third-Order Terms
−83
Aperture Delay
10
Aperture Jitter
40
Full Power Bandwidth
3.2
1.9
750
450
DC ACCURACY
dB min
dB max
dB max
dB typ
dB typ
ns typ
ps typ
MHz typ
MHz typ
kHz typ
kHz typ
Resolution
Integral Nonlinearity
Differential Nonlinearity
10
Bits
±0.5
LSB max
±0.5
LSB max
Offset Error
Gain Error
Total Unadjusted Error (TUE)
ANALOG INPUT
Input Voltage Ranges
DC Leakage Current
Input Capacitance
LOGIC INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN, SCLK Pin
Input Current, IIN, CS Pin
Input Capacitance, CIN
LOGIC OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
Floating-State Leakage Current
Floating-State Output Capacitance
Output Coding
CONVERSION RATE
Conversion Time
Throughput Rate
±0.2
LSB max
±0.2
LSB max
±1
LSB max
0 to VDD
±1
20
V
μA max
pF typ
0.7 × VDD
2
0.2 × VDD
0.3 × VDD
0.8
±1
±1
10
V min
V min
V max
V max
V max
μA max
μA typ
pF max
VDD − 0.2
0.2
±1
10
Straight (natural)
binary
V min
V max
μA max
pF max
3.52
μs max
275
kSPS max
Test Conditions/Comments
Maximum/minimum specifications apply as typical figures
when VDD = 1.6 V, fIN = 30 kHz sine wave
See the Terminology section
See the Terminology section
See the Terminology section
fa = 29.1 kHz, fb = 29.9 kHz; see the Terminology section
@ 3 dB, 2.5 V ≤ VDD ≤ 3.6 V
@ 3 dB, 1.6 V ≤ VDD ≤ 2.2 V
@ 0.1 dB, 2.5 V ≤ VDD ≤ 3.6 V
@ 0.1 dB, 1.6 V ≤ VDD ≤ 2.2 V
Maximum specifications apply as typical figures when
VDD = 1.6 V
See the Terminology section
Guaranteed no missed codes to 10 bits; see the
Terminology section
See the Terminology section
See the Terminology section
See the Terminology section
1.6 V ≤ VDD < 2.7 V
2.7 V ≤ VDD ≤ 3.6 V
1.6 V ≤ VDD < 1.8 V
1.8 V ≤V DD < 2.7 V
2.7 V ≤ VDD ≤ 3.6 V
Typically 20 nA, VIN = 0 V or VDD
Sample tested at 25°C to ensure compliance
ISOURCE = 200 μA, VDD = 1.6 V to 3.6 V
ISINK = 200 μA
Sample tested at 25°C to ensure compliance
12 SCLK cycles with SCLK at 3.4 MHz
See the Serial Interface section
Rev. C | Page 5 of 28
Share Link: 