M27V102 查看數據表（PDF） - STMicroelectronics
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M27V102 Datasheet PDF : 15 Pages
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M27V102
Figure 2A. DIP Pin Connections
VPP
E
Q15
Q14
Q13
Q12
Q11
Q10
Q9
Q8
VSS
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
G
1
40
2
39
3
38
4
37
5
36
6
35
7
34
8
33
9
32
10
31
M27V102
11
30
12
29
13
28
14
27
15
26
16
25
17
24
VCC
P
NC
A15
A14
A13
A12
A11
A10
A9
VSS
A8
A7
A6
A5
A4
A3
18
23 A2
19
22 A1
20
21 A0
AI01913
Warning: NC = Not Connected.
Figure 2C. TSOP Pin Connections
A9
A10
A11
A12
A13
A14
A15
NC
P
VCC
VPP
E
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
1
40 VSS
A8
A7
A6
A5
A4
A3
A2
A1
10 M27V102 31 A0
11 (Normal) 30 G
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
20
21 VSS
AI01915
Warning: NC = Not Connected.
2/15
Figure 2B. LCC Pin Connections
Q12
Q11
Q10
Q9
Q8
VSS 12
NC
Q7
Q6
Q5
Q4
1 44
M27V102
23
A13
A12
A11
A10
A9
34 VSS
NC
A8
A7
A6
A5
AI01914
Warning: NC = Not Connected.
DESCRIPTION (cont’d)
For application where the content is programmed
only one time and erasure is not required, the
M27V102 is offered in PDIP40, PLCC32 and
TSOP40 (10 x 14 mm) packages.
DEVICE OPERATION
The operating modes of the M27V102 are listed in
the Operating Modes table. A single power supply
is required in the read mode. All inputs are TTL
levels except for Vpp and 12V on A9 for Electronic
Signature.
Read Mode
The M27V102 has two control functions, both of
which must be logically active in order to obtaindata
at the outputs. Chip Enable (E) is the power control
and should be used for device selection. Output
Enable (G) is the output control and should be used
to gate data to the output pins, independent of
device selection. Assuming that the addresses are
stable, the address access time (tAVQV) is equal to
the delay from E to output (tELQV). Data is available
at the output after a delay of tOE from the falling
edge of G, assuming that E has been low and the
addresses have been stable for at least tAVQV-
tGLQV.
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