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M28F420 查看數據表(PDF) - STMicroelectronics

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M28F420 Datasheet PDF : 38 Pages
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M28F410, M28F420
Table 5. Instructions
Mne-
monic
Instruction
Cycles
1st Cycle
Operation Address (1)
Data (4)
2nd Cycle
Operation Address
Data
Read
RD Memory
Array
1+
Write
X
0FFh
Read (2)
Read
Address
Data
Read
RSR Status
1+
Write
X
Register
70h
Read (2)
X
Status
Register
Read
RSIG Electronic
3
Write
X
Signature
90h
Read (2)
Signature
Adress (3)
Signature
EE Erase
2
Write
X
20h
Write
Block
Address
0D0h
PG Program
2
Write
X
40h or 10h Write
Address Data Input
Clear
CLRS Status
1
Write
X
50h
Register
ES
Erase
Suspend
1
Write
X
0B0h
ER
Erase
Resume
1
Write
X
0D0h
Notes: 1. X = Don’t Care.
2. The first cycle of the RD, RSR or RSIG instruction is followed by read operations to read memory array, Status Register
or Electronic Signature codes. Any number of Read cycle can occur after one command cycle.
3. Signature address bit A0=VIL will output Manufacturer code. Address bit A0=VIH will output Device code. Other address bits are
ignored.
4. When word organization is used, upper byte is don’t care for command input.
Table 6. Commands
Hex Code
00h
10h
20h
40h
50h
70h
90h
0B0h
0D0h
0FFh
Command
Invalid/Reserved
Alternative Program Set-up
Erase Set-up
Program Set-up
Clear Status Register
Read Status Register
Read Electronic Signature
Erase Suspend
Erase Resume/Erase Confirm
Read Array
Blocks
Erasure of the memories is in blocks. There are 7
blocks in the memory address space, one Boot
Block of 16K Bytes or 8K Words, two ’Key Parame-
ter Blocks’ of 8K Bytes or 4K Words, one ’Main
Block’ of 96K Bytes or 48K Words, and three ’Main
Blocks’of 128KBytes or 64K Words. The M28F410
memory has the Boot Block at the top of the mem-
ory address space (3FFFFh) and the M28F420
locates the Boot Block starting at the bottom
(00000h). Erasure of each block takes typically 1
second and each block can be programmed and
erased over 100,000 cycles.
The Boot Block is hardware protected from acci-
dental programming or erasure depending on the
RP signal. Program/Erase commands in the Boot
Block are executed only when RP is at 12V. Block
erasure may be suspended while data is read from
other blocks of the memory, then resumed.
Bus Operations
Six operationscan beperformed by the appropriate
bus cycles, Read Byte or Word from the Array,
Read Electronic Signature, Output Disable,
Standby, Power Down and Write the Command of
an Instruction.
Command Interface
Commands can be written to a Command Interface
(C.I.) latch to perform read, programming, erasure
and to monitor the memory’s status. When power
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