HP3103 查看數據表（PDF） - Fairchild Semiconductor
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HP3103 Datasheet PDF : 7 Pages
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HPLR3103, HPLU3103
Typical Performance Curves (Continued)
1000
VDS = 15V
20µs PULSE WIDTH
100
TJ = 25oC
10
TJ = 150oC
1
2
3
4
5
6
7
8
9
VGS, GATE TO SOURCE VOLTAGE (V)
FIGURE 3. TRANSFER CHARACTERISTICS
3200
2800
2400
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS ≈ CDS + CGS
2000
1600
CISS
1200
800
COSS
400
0
1
CRSS
10
100
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 5. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
1000
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
ID = 46A, VGS = 10V
100
TJ = 175oC
TJ = 25oC
10
0.4
0.8
1.2
1.6
2.0
2.4
2.8
VSD, SOURCE TO DRAIN VOLTAGE (V)
FIGURE 7. SOURCE TO DRAIN DIODE FORWARD VOLTAGE
©2001 Fairchild Semiconductor Corporation
2.5 PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
ID = 46A, VGS = 10V
2.0
1.5
1.0
0.5
0
-80 -40
0
40
80
120 160 200
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 4. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
20
ID = 34A
16
12
VDS = 24V
VDS = 15V
8
4
0
0
10
20
30
40
QG, TOTAL GATE CHARGE (nC)
FIGURE 6. GATE CHARGE WAVEFORMS FOR CONSTANT
GATE CURRENT
1000
100
OPERATION IN THIS
10
AREA MAY BE
LIMITED BY rDS(ON)
10µs
100µs
1ms
10ms
VDSS MAX = 30V
1
1
10
100
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 8. FORWARD BIAS SAFE OPERATING AREA
HPLR3103, HPLU3103 Rev. B
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