4250 查看數據表（PDF） - MITSUBISHI ELECTRIC
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4250 Datasheet PDF : 58 Pages
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MITSUBISHI MICROCOMPUTERS
4250 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
ABSOLUTE MAXIMUM RATINGS
Symbol
VDD
VI
VI
VO
VO
VO
Pd
Topr
Tstg
Parameter
Supply voltage
Input voltage XIN, G0–G3, D2/C, D3/K
Input voltage F0, F1, S0–S3, D0, D1, RESET
Output voltage XOUT
Output voltage F0, F1, S0–S3, D0, D1
Output voltage G0–G3, D2/C, D3/K
Power dissipation
Operating temperature range
Storage temperature range
Conditions
Ratings
Unit
–0.3 to 7.0
V
–0.3 to VDD+0.3
V
–0.3 to 8.0
V
–0.3 to VDD+0.3
V
Output transistors
–0.3 to 8.0
V
in cut-off state
–0.3 to VDD+0.3
V
Ta = 25 °C
300
mW
–20 to 85
°C
–40 to 125
°C
RECOMMENDED OPERATING CONDITIONS
(Ta = –20 °C to 85 °C, VDD = 2.2 V to 5.5 V, unless otherwise noted)
Symbol
Parameter
Conditions
Limits
Unit
Min. Typ. Max.
VDD
Supply voltage
0.4 MHz ≤ f(XIN) ≤ 4.4 MHz 4.5
5.0
5.5 V
0.4 MHz ≤ f(XIN) ≤ 1.1 MHz 2.2
5.5 V
VRAM RAM back-up voltage (at RAM back-up mode)
2.0
5.5 V
VSS
Supply voltage
0
V
VIH
“H” level input voltage F0, F1, D0, D1
0.7VDD
7
V
VIH
“H” level input voltage G0–G3, D2, D3
0.7VDD
VDD
V
VIH
“H” level input voltage INT
0.85VDD
VDD
V
VIH
“H” level input voltage C, K
VDD = 4.5 V to 5.5 V
0.5VDD
VDD
V
VDD = 2.2 V to 5.5 V
0.7VDD
VDD
V
VIH
“H” level input voltage S0–S3
VDD = 4.5 V to 5.5 V
0.4VDD
7
V
VDD = 2.2 V to 5.5 V
0.6VDD
7
V
VIH
“H” level input voltage RESET
0.85VDD
7
V
VIL
“L” level input voltage C, K
0
0.16VDD V
VIL
“L” level input voltage S0–S3
0
0.2VDD V
VIL
“L” level input voltage F0, F1, G0–G3, D0–D3
0
0.3VDD V
VIL
“L” level input voltage INT
0
0.15VDD V
VIL
“L” level input voltage RESET
0
0.1VDD V
IOL(peak) “L” level peak output current
24 mA
F0, F1, S0–S3, D0, D1, D2/C, D3/K
IOL(peak) “L” level peak output current G0, G1/TOUT, G2, G3
10 mA
IOL(avg) “L” level average output current
(Note 1)
12 mA
F0, F1, S0–S3, D0, D1, D2/C, D3/K
IOL(avg) “L” level average output current G0, G1/TOUT, G2, G3
(Note 1)
5 mA
f(XIN) System clock frequency (Note 2)
VDD = 4.5 V to 5.5 V
0.4
4.0
4.4 MHz
VDD = 2.2 V to 5.5 V
0.4
1.0
1.1
∆f(XIN) Frequency error (errors of external capacitor and resistor VDD = 5 V ±10 %
±17 %
not included)
Ta = 25 °C [reference]
Note: Use the 30 pF capacitor externally and enable the (–20 °C to 85 °C)
change of frequency by external resistor.
VDD = 3 V ±10 %
±17
Ta = 25 °C [reference]
(–20 °C to 85 °C)
Notes 1: Keep the total currents of IOL(avg) for ports S0–S3, D0, D1, D2/C, D3/K to 50 mA or less.
Keep the total currents of IOL(avg) for ports F0, F1, G0, G2, G3 and G1/TOUT pin to 30 mA or less.
2: The system clock frequency is affected by the external capacitor, resistor and LSI. Accordingly, set the constants so as not
to exceed the frequency limits.
Be careful about the input waveform when using the external clock. Refer to the notes on use.
MITSUBISHI
ELECTRIC
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