M48Z08MH 查看數據表（PDF） - STMicroelectronics
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M48Z08MH Datasheet PDF : 18 Pages
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M48Z08, M48Z18
Table 5. Capacitance (1, 2)
(TA = 25 °C)
Symbol
Parameter
Test Condition
Min
Max
Unit
CIN
Input Capacitance
VIN = 0V
CIO (3)
Input / Output Capacitance
VOUT = 0V
Notes: 1. Effective capacitance measured with power supply at 5V.
2. Sampled only, not 100% tested.
3. Outputs deselected
10
pF
10
pF
Table 6. DC Characteristics
(TA = 0 to 70°C; VCC = 4.75V to 5.5V or 4.5V to 5.5V)
Symbol
ILI (1)
ILO (1)
ICC
ICC1
Parameter
Input Leakage Current
Output Leakage Current
Supply Current
Supply Current (Standby) TTL
Test Condition
0V ≤ VIN ≤ VCC
0V ≤ VOUT ≤ VCC
Outputs open
E = VIH
ICC2
VIL (2)
VIH
Supply Current (Standby) CMOS
Input Low Voltage
Input High Voltage
E = VCC – 0.2V
VOL
Output Low Voltage
IOL = 2.1mA
VOH
Output High Voltage
IOH = –1mA
Notes: 1. Outputs deselects.
2. Negative spikes of –1V allowed for up to 10ns once per cycle.
Min
Max
Unit
±1
µA
±5
µA
80
mA
3
mA
3
mA
–0.3
0.8
V
2.2
VCC + 0.3
V
0.4
V
2.4
V
Table 7. Power Down/Up Trip Points DC Characteristics (1)
(TA = 0 to 70°C)
Symbol
Parameter
Min
Typ
Max
Unit
VPFD
Power-fail Deselect Voltage (M48Z08)
4.5
4.6
4.75
V
VPFD
Power-fail Deselect Voltage (M48Z18)
4.2
4.3
4.5
V
VSO
Battery Back-up Switchover Voltage
3.0
V
tDR
Expected Data Retention Time
11
Note: 1. All voltages referenced to VSS.
YEARS
DESCRIPTION (cont’d)
For the 28 lead SOIC, the battery package (i.e.
SNAPHAT) part number is "M4Z28-BR00SH1".
The M48Z08/18 also has its own Power-fail Detect
circuit. The control circuitry constantly monitors the
single 5V supply for an out of tolerance condition.
When VCC is out of tolerance, the circuit write
protects the SRAM, providing a high degree of data
security in the midst of unpredictable system op-
eration brought on by low VCC. As VCC falls below
approximately 3V, the control circuitry connects the
battery which maintains data until valid power re-
turns.
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