ML9211 查看數據表（PDF） - Oki Electric Industry

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ML9211

56-Bit Duplex/Triplex (1/2 duty / 1/3 duty) VF Controller/Driver with Digital Dimming

Oki Electric Industry 

¡ Semiconductor

ML9211

PIN DESCRIPTIONS

Pin

Symbol

Type

QFP-1* QFP-2*

Description

VDISP

65, 80 63 78 — Power supply pins for VFD driver circuit.

These should be connected externally.

VDD

D-GND

25

23 — Power supply pin for logic drive.

24, 40 22, 38 — D-GND is ground pin for the VFD driver circuit. L-GND is ground pin for the

L-GND

33

31 — logic circuit. These should be connected externally.

42 to 64, 40 to 62,

SEG1 to 37

O

66 to 79 64 to 77

79, 80,

SEG38 to 56 1 to 19 1 to 17 O

GRID1

20

18

GRID2

21

19 O

GRID3

22

20

Segment (anode) signal output pins for a VFD tube. These pins can be directly

connected to the VFD tube. External circuit is not required.

IOH£–5 mA

Segment (anode) signal output pins for a VFD tube.These pins can be directly

connected to the VFD tube. External circuit is not required.

IOH£–10 mA

Inverted Grid signal output pins. For pre-driver, the external circuit is required.

IOL£10 mA

CS

29

27

I Chip select input pin.

Data is not transferred when CS is set to a Low level.

CLOCK

30

28

I Shift clock input pin.

Serial data shifts at the rising edge of the CLOCK.

DATA IN 31

29

I Serial data input pin (positive logic).

Data is input to the shift register at the rising edge of the CLOCK signal.

DUP/TRI 35

Duplex/Triplex operation select input pin.

33 I Duplex (1/2 duty) operation is selected when this pin is set to VDD.

Triplex (1/3 duty) operation is selected when this pin is set to L-GND.

Master/Slave mode select input pin.

M/S

36

34 I Master mode is selected when this pin is set to VDD.

Slave mode is selected when this pin is set to L-GND.

Dimming pulse input.

When the slave mode is selected, connect this pin to the master side DIM

OUT pin at the slave mode. The pulse width of the all segment output are

DIM IN

26

24 I controlled by a input pulse width of DIM IN.

When the master mode is selected, the input level of this pin is ignored.

Connect this pin to VDD or L-GND at the master mode. The pulse width of the

all grids and segment outputs are controlled by a built-in 10-bit dimming circuit.

SYNC IN 1 27

SYNC IN 2 28

DIM OUT 39

Synchronous signal input.

25

When the slave mode is selected, connect these pins to the master side SYNC

I OUT 1 and 2 pins.

26

When the master mode is selected, the input level of these pins are ignored.

Connect these pins to VDD or L-GND at the master mode.

37

O Dimming pulse output.

Connect this pin to the slave side DIM IN pin.

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