M48Z58-70MH1 查看數據表（PDF） - STMicroelectronics
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M48Z58-70MH1 Datasheet PDF : 17 Pages
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Figure 3. Block Diagram
M48Z58, M48Z58Y
LITHIUM
CELL
VOLTAGE SENSE
AND
SWITCHING
CIRCUITRY
POWER
VPFD
8K x 8
SRAM ARRAY
A0-A12
DQ0-DQ7
E
W
G
VCC
VSS
AI01394
DESCRIPTION (cont’d)
The M48Z58/58Y is a non-volatile pin and function
equivalent to any JEDEC standard 8K x 8 SRAM.
It also easily fits into many ROM, EPROM, and
EEPROM sockets, providing the non-volatility of
PROMs without any requirement for special write
timing or limitations on the number of writes that
can be performed.
The 28 pin 600mil DIP CAPHAT™ houses the
M48Z58/58Y silicon with a long life lithium button
cell in a single package.
The 28 pin 330mil SOIC provides sockets with gold
plated contacts at both ends for direct connection
to a separate SNAPHAT housing containing the
battery. The unique design allows the SNAPHAT
battery package to be mounted on top of the SOIC
package after the completion of the surface mount
process. Insertion of the SNAPHAT housing after
reflow prevents potential battery damage due to the
high temperatures required for device surface-
mounting. The SNAPHAT housing is keyed to pre-
vent reverse insertion.
The SOIC and battery packages are shipped sepa-
rately in plastic anti-static tubes or in Tape & Reel
form.
Table 4. AC Measurement Conditions
Input Rise and Fall Times
≤ 5ns
Input Pulse Voltages
0 to 3V
Input and Output Timing Ref. Voltages 1.5V
Note that Output Hi-Z is defined as the point where data is no
longer driven.
Figure 4. AC Testing Load Circuit
5V
DEVICE
UNDER
TEST
1kΩ
1.9kΩ
OUT
CL = 100pF or 5pF
CL includes JIG capacitance
AI01030
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