M48Z35-70MH1 查看數據表（PDF） - STMicroelectronics

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M48Z35-70MH1

256Kbit (32Kbit x 8) ZEROPOWER® SRAM

STMicroelectronics 

M48Z35

M48Z35Y

256Kbit (32Kbit x 8) ZEROPOWER® SRAM

Features

■ Integrated, ultra low power SRAM, power-fail

control circuit, and battery

■ READ cycle time equals WRITE cycle time

■ Automatic power-fail chip deselect and WRITE

protection

■ WRITE protect voltages:

(VPFD = Power-fail Deselect Voltage)

– M48Z35: VCC = 4.75 to 5.5V

4.5V ≤ VPFD ≤ 4.75V

– M48Z35Y: 4.5 to 5.5V

4.2v ≤ Vpfd ≤ 4.5v

■ Self-contained battery in the CAPHAT™ DIP

package

■ Packaging includes a 28-lead SOIC and

SNAPHAT® top (to be ordered separately)

■ Pin and function compatible with JEDEC

standard 32K x 8 SRAMs

■ SOIC package provides direct connection for a

SNAPHAT top which contains the battery

■ RoHS compliant

– Lead-free second level interconnect

28

1

PCDIP28 (PC)

Battery CAPHAT

SNAPHAT (SH)

Battery

28

1

SOH28 (MH)

November 2007

Rev 7

1/23

www.st.com

1

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