QL4058-2PQ208C 查看數據表（PDF） - QuickLogic Corporation

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QL4058-2PQ208C

8,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM

QuickLogic Corporation 

QL4058 QuickRAM Data Sheet

• • • • • • 58,000 Usable PLD Gate QuickRAM ESP Combining Performance,

Density and Embedded RAM

Device Highlights

High Performance & High Density

• 58,000 Usable PLD Gates with 252 I/Os

• 300 MHz 16-bit Counters, 400 MHz

Datapaths, 160+ MHz FIFOs

• 0.35 µm four-layer metal non-volatile

CMOS process for smallest die sizes

Advanced I/O Capabilities

• Interfaces with both 3.3 V and 5.0 V devices

• PCI compliant with 3.3 V and 5.0 V busses

for -1/-2/-3/-4 speed grades

• Full JTAG boundary scan

• I/O Cells with individually controlled

Registered Input Path and Output Enables

High Speed Embedded SRAM

• 18 dual-port RAM modules, organized in

user-configurable 1,152 bit blocks

• 5 ns access times, each port independently

accessible

• Fast and efficient for FIFO, RAM, and ROM

functions

18

RAM

Blocks

1,008

High Speed

Logic Cells

Easy to Use / Fast Development

Cycles

• 100% routable with 100% utilization and

complete pin-out stability

• Variable-grain logic cells provide high

performance and 100% utilization

• Comprehensive design tools include high

quality Verilog/VHDL synthesis

Interface

Figure 1: QuickRAM Block Diagram

© 2002 QuickLogic Corporation

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