M5M54R08AJ 查看數據表（PDF） - Mitsumi
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M5M54R08AJ Datasheet PDF : 6 Pages
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MITSUBISHI LSIs
M5M54R08AJ-10,-12,-15
4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM
FUNCTION
The operation mode of the M5M54R08AJ is determined by a
combination of the device control inputs S, W and OE. Each
mode is summarized in the function table.
A write cycle is executed whenever the low level W
overlaps with the low level S. The address must be set-up
before the write cycle and must be stable during the entire
cycle.
The data is latched into a cell on the trailing edge of W or
S, whichever occurs first, requiring the set-up and hold time
relative to these edge to be maintained. The output enable
input OE directly controls the output stage. Setting the OE at
a high level, the output stage is in a high impedance state,
and the data bus
contention problem in the write cycle is eliminated.
A read cycle is excuted by setting W at a high level and
OE at a low level while S are in an active state (S=L).
When setting S at high level, the chip is in a non-
selectable mode in which both reading and writing are
disable. In this mode, the output stage is in a high-
impedance state, allowing OR-tie with other chips and
memory expansion by S.
Signal-S controls the power-down feature. When S goes
high, power dissapation is reduced extremely. The access
time from S is equivalent to the address access time.
FUNCTION TABLE
S W OE
Mode
HXX
Non selection
LLX
Write
L HL
Read
L HH
DQ
High-impedance
Din
Dout
High-impedance
Icc
Stand by
Active
Active
Active
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Conditions
Ratings
Unit
V cc
Supply voltage
- 2.0 *~ 4.6
V
VI
Input voltage
VO
Output voltage
With respect to GND
- 2.0*~ VCC+0.5 V
- 2.0*~ VCC
V
Pd
Power dissipation
Ta=25°C
1000
mW
Topr
Operating temperature
0 ~ 70
°C
Tstg(bias) Storage temperature(bias)
- 10 ~ 85
°C
Tstg
Storage temperature
- 65 ~ 150
°C
* Pulse width≤3ns, In case of DC: - 0.5V
DC
ELECTRICAL
CHARACTERISTICS
(Ta=0
~
70°C,
+10%
Vcc=3.3V - 5%
,unless
otherwise
noted)
Symbol
Parameter
Condition
VIH High-level input voltage
VIL Low-level input voltage
VOH High-level output voltage IOH= - 4mA
VOL Low-level output voltage IOL = 8mA
II
Input current
VI= 0 ~ Vcc
I OZ
Output current in off-state
VI(S)=VIH
VI/O= 0 ~ Vcc
Active supply current
I CC1 (TTL level)
VI(S)=VIL
other inpus=VIH or VIL
Output-open(duty 100%)
Stand by current
I CC2 (TTL level)
I CC3 Stand by current
VI(S)=VIH
VI(S)=Vcc≥0.2V
other inputs VI≤0.2V
or VI ≥Vcc - 0.2V
Limits
Min Typ Max Unit
2.0
Vcc+0.3 V
0.8 V
2.4
V
0.4 V
2 uA
2 uA
10ns cycle
AC 12ns cycle
15ns cycle
DC
10ns cycle
AC 12ns cycle
15ns cycle
DC
230
220 mA
200
100
90
70 mA
60
40
10 mA
Note 1: Direction for current flowing into an IC is positive (no mark).
MITSUBISHI
ELECTRIC
2
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