M5M5V416BRT 查看數據表（PDF） - Mitsumi
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M5M5V416BRT Datasheet PDF : 11 Pages
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revision-P04, ' 98.12.16
M5M5V416BTP,RT
Write cycle (S1 control mode)
A 0~17
MITSUBISHI LSIs
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change
4194304-BIT (262144-WORD BY 16-BIT) CMOS STATIC RAM
tCW
BC1 ,BC2
S1
(Note3)
tsu (A)
tsu (S1)
trec (W)
(Note3)
S2
(Note3)
(Note5)
W
(Note3)
DQ1~16
Write cycle (S2 control mode)
A 0~17
BC1,BC2
S1
(Note3)
tsu (A)
(Note4)
tsu (D) th (D)
DATA IN
STABLE
tCW
tsu (S2)
trec (W)
(Note3)
(Note3)
(Note3)
S2
W
DQ1~16
(Note3)
(Note5)
(Note3)
(Note4)
tsu (D) th (D)
DATA IN
STABLE
(Note3)
(Note3)
MITSUBISHI ELECTRIC
7
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