M62421FP 查看數據表（PDF） - Renesas Electronics

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产品描述 (功能)

生产厂家

M62421FP

Tone and Volume Controller with 2 Line Control

Renesas Electronics 

M62421SP/FP

Data and Clock

CLK

D0

D1

D2

DAT

DATA is read by CLK rise edge.

Bus Line Timing Specification

75%

25%

tr

tf

tWHC

D3

D10

D11

D12

Latch signal "H"

Latch signal is read by CLK fall edge.

tcr

tWLC

Item

CLK clock frequency

The HIGH period of the clock

The LOW period of the clock

Rise time of CLK line

Fall time of CLK line

Set-up time DATA

Hold time DATA

tSD

tHD

Symbol

Min

tcr

4

tWHC

1.6

tWLC

1.6

tr

—

tf

—

tSD

0.8

tHD

0.8

Max

—

—

—

0.4

0.4

—

—

Units

µs

µs

µs

µs

µs

µs

µs

REJ03F0208-0201 Rev.2.01 Mar 31, 2008

Page 9 of 13

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