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5962-9161706QZC 查看數據表(PDF) - Atmel Corporation

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5962-9161706QZC
Atmel
Atmel Corporation Atmel
5962-9161706QZC Datasheet PDF : 27 Pages
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M67025E
update the data structure. Once the update is completed the data structure may be
released.
This allows the interpreting processor, to return to read the complete data structure, thus
ensuring a consistent data structure.
Truth Table
Table 1. Non Contention Read/Write Control
Note: Inputs(1)
CS
R/W
OE
UB
LB
SEM
H
X
X
X
X
H
X
X
X
H
H
H
L
L
X
H
L
H
L
L
X
L
L
H
L
H
L
L
H
H
L
H
L
H
L
H
L
H
L
L
L
H
X
X
H
X
X
X
H
H
L
X
X
L
X
H
L
H
H
L
H
X
X
X
L
X
X
H
H
L
L
X
X
L
X
L
L
X
X
X
L
L
Outputs
IO8 - IO15
Hi-Z
I/O0- I/O7
Hi-Z
Hi-Z
Hi-Z
Hi-Z
DATAIN
DATAOUT
Hi-Z
DATAOUT
Hi-Z
DATAIN
DATAIN
Hi-Z
DATAOUT
DATAOUT
Hi-Z
DATAOUT
DATAOUT
DATAIN
DATAIN
DATAOUT
DATAOUT
DATAIN
DATAIN
Mode
Deselected: Power Down
Deselected: Power Down
Write to Lower Byte Only
Write to Both Bytes
Read Upper Byte Only
Read Lower Byte Only
Read Both Bytes
Outputs Disabled
Read Data in Sema. Flag
Read Data in Sema. Flag
Write DIN0 into Sema. Flag
Write DIN0 into Sema. Flag
Not Allowed
Not Allowed
Note: 1. AOL - A12 AOR n- A12R
Table 2. Arbitration Options
Inputs
Options
CS
UB
LB
M/S
SEM
Busy Logic Master
L
X
L
H
H
L
L
X
H
H
Busy Logic Slave
L
X
L
L
H
L
L
X
L
H
Interrupt Logic
L
X
L
X
H
L
L
X
X
H
Semaphore Logic(1)
H
X
X
H
L
H
X
X
L
L
Note: 1. Inputs Signals are for Semaphore Flags set and test (Write and Read) operations.
Outputs
BUSY
INT
Output
Signal
Input
Signal
Output
Signal
H
Hi-Z
8
4146J–AERO–06/03

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