M69KB096AB 查看數據表（PDF） - STMicroelectronics

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M69KB096AB

64 Mbit (4Mb x 16)/ 104MHz Clock Rate 1.8V Supply - Bare Die Burst PSRAM

STMicroelectronics 

1 Summary description

M69KB096AB

Figure 1. Logic Diagram

VCC VCCQ

22

A0-A21

W

E

CR

G

UB

LB

K

L

16

M69KB096AB

DQ0-DQ15

WAIT

VSS VSSQ

AI11565

Table 1.

A0-A21

Signal Names

Address Inputs

DQ0-DQ15

Data Inputs/Outputs

E

Chip Enable Input

CR

Configuration Register Enable Input

G

Output Enable Input

W

Write Enable Input

UB

Upper Byte Enable Input

LB

Lower Byte Enable Input

K

Clock Input

L

Latch Enable Input

WAIT

Wait Output

VCC

Core Supply Voltage

VCCQ

Input/Output Buffers Supply Voltage

VSS

Ground

VSSQ

Input/Output Buffers Ground

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