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FIN1532 查看數據表(PDF) - Fairchild Semiconductor

零件编号
产品描述 (功能)
生产厂家
FIN1532
Fairchild
Fairchild Semiconductor Fairchild
FIN1532 Datasheet PDF : 6 Pages
1 2 3 4 5 6
AC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Symbol
Parameter
Test Conditions
Min
Typ
Max
(Note 3)
Units
tPLH
Propagation Delay
LOW-to-HIGH
1.0
2.0
3.0
ns
tPHL
tTLH
tTHL
tSK(P)
tSK(LH),
tSK(HL)
tSK(PP)
fMAX
Propagation Delay
HIGH-to-LOW
Output Rise Time (20% to 80%)
Output Fall Time (80% to 20%)
Pulse Skew |tPLH - tPHL|
Channel-to-Channel Skew
(Note 4)
Part-to-Part Skew (Note 5)
Maximum Operating Frequency
(Note 6)
1.0
2.0
3.0
ns
|VID| = 400 mV, CL = 10 pF, RL = 1k
See Figure 1 and Figure 2
1.3
ns
1.1
ns
0.2
0.5
ns
0.1
0.3
ns
RL = 1k, CL = 10 pF,
See Figure 1 and Figure 2
1.0
ns
200
260
MHz
tZH
LVTTL Output Enable Time from Z to HIGH RL = 1k, CL = 10 pF,
tZL
LVTTL Output Enable Time from Z to LOW See Figure 3 and Figure 4
tHZ
LVTTL Output Disable Time from HIGH to Z
tLZ
LVTTL Output Disable Time from LOW to Z
Note 3: All typical values are at TA = 25°C and with VCC = 5V.
8
12.0
ns
8
12.0
ns
4
8.0
ns
4
8.0
ns
Note 4: tSK(LH), tSK(HL) is the skew between specified outputs of a single device when the outputs have identical loads and are switching in the same direc-
tion.
Note 5: tSK(PP) is the magnitude of the difference in propagation delay times between any specified terminals of two devices switching in the same direction
(either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits.
Note 6: fMAX Criteria: Input tR = tF < 1 ns, VID = 300 mV, (1.05V to 1.35V pp), 50% duty cycle; Output duty cycle 40% to 60%, VOL < 0.5V, VOH > 2.4V.
All channels switching in phase.
Note A: All input pulses have frequency = 10 MHz, tR or tF = 1 ns
Note B: CL includes all probe and jig capacitances
FIGURE 1. Differential Receiver Voltage Definitions and Propagation Delay
3
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