CY7C43644 查看數據表（PDF） - Cypress Semiconductor

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CY7C43644

1K/4K x36 x2 Bidirectional Synchronous FIFO with Bus Matching

Cypress Semiconductor 

CY7C43644

CY7C43664

CY7C43684

1K/4K x36 x2 Bidirectional Synchronous

FIFO with Bus Matching

Features

• High-speed, low-power, bidirectional, First-In, First-Out

(FIFO) memories with bus matching capabilities

• 1K x36 x2 (CY7C43644)

• 4K x36 x2 (CY7C43664)

• 16K x36 x2 (CY7C43684)

• 0.35-micron CMOS for optimum speed/power

• High-speed 133-MHz operation (7.5 ns read/write

cycle times)

• Low power

— ICC = 100 mA

— ISB = 10 mA

Logic Block Diagram

• Fully asynchronous and simultaneous read and write

operation permitted

• Mailbox bypass register for each FIFO

• Parallel and Serial Programmable Almost-Full and

Almost-Empty flags

• Retransmit function

• Standard or FWFT mode user selectable

• Partial Reset

• Big or Little Endian format for word or byte bus sizes

• 128-pin TQFP packaging

• Easily expandable in width and depth

CLKA

CSA

W/RA

ENA

MBA

RT2

MRS1

PRS1

FFA/IRA

AFA

SPM

FS0/SD

FS1/SEN

A0–35

EFA/ORA

AEA

Port A

Control

Logic

FIFO1,

Mail 1

Reset

Logic

36

Mail 1

Register

1K/4K/16K

x36

Dual Ported

Memory

Write

Pointer

Read

Pointer

Status

Flag Logic

Programmable

Flag Offset

Registers

Timing

Mode

Status

Flag Logic

Write

Pointer

Read

Pointer

256/512/1K

4K/16K x36

Dual Ported

Memory

Port B

Control

Logic

MBF1

CLKB

CSB

W/RB

ENB

MBB

RTI

BE

BM

SIZE

36

FIFO1,

Mail 1

Reset

Logic

EFB/ORB

AEB

B0–35

BE/FWFT

FFB/IRB

AFB

MRS2

PRS2

MBF2

Mail 2

Register

Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600

Document #: 38-06022 Rev. *B

Revised December 26, 2002

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