12-Bit, 40Msps, 3.3V, Low-Power ADC
with Internal Reference
ELECTRICAL CHARACTERISTICS (continued)
(VAVDD = VDVDD = 3.3V, AGND = DGND = 0, VIN = ±1.024V, differential input voltage at -0.5dB FS, internal reference,
fCLK = 40MHz (50% duty cycle), digital output load CL ≈ 10pF, TA ≥ +25°C guaranteed by production test, TA < +25°C guarnateed
by design and characterization. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Differential Gain
DG
Differential Phase
DP
ANALOG INPUTS (INP, INN, CML)
Input Resistance
RIN
Input Capacitance
CIN
Common-Mode Input Level
(Note 5)
VCML
Either input to ground
Either input to ground
±1
±0.25
32.5
4
VAVDD
× 0.5
%
degrees
kΩ
pF
V
Common-Mode Input Voltage
Range (Note 5)
Differential Input Range
Small-Signal Bandwidth
Large-Signal Bandwidth
Overvoltage Recovery
VCMVR
VIN
BW-3dB
FPBW-3dB
VINP - VINN (Note 6)
(Note 7)
(Note 7)
OVR 1.5 ✕ FS input
VCML
±5%
±VDIFF
400
150
1
V
V
MHz
MHz
Clock
Cycle
INTERNAL REFERENCE (REFIN bypassed with 0.22µF in parallel with 1nF)
Common-Mode Reference Input
Voltage
VCML At CML
VAVDD
V
✕ 0.5
Positive Reference Voltage
Range
VREFP At REFP
VCML
V
+ 0.512
Negative Reference Voltage
Range
VREFN
Differential Reference Voltage
Range
VDIFF
Differential Reference
Temperature Coefficient
REFTC
EXTERNAL REFERENCE (VREFIN = 2.048V)
REFIN Input Resistance
RIN
REFIN Input Capacitance
CIN
REFIN Reference Input Voltage
VREFIN
At REFN
(Note 6)
(Note 8)
VCML
- 0.512
1.024
±5%
±100
5
10
2.048
±10%
V
V
ppm/°C
kΩ
pF
V
Differential Reference Voltage
VDIFF (Note 6)
0.92 ✕
1.08 ✕
VREFIN /
2
VREFIN /
2
VREFIN /
2
V
EXTERNAL REFERENCE (VREFIN = AGND, reference voltage applied to REFP, REFN, and CML)
REFP, REFN, CML Input Current
IIN
-200
+200 µA
REFP, REFN, CML Input
Capacitance
CIN
15
pF
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